This reverts commit b419957e.

* [Build] initial commit for a build util fxn

* [Build] flesh out build_dataflow

* [Build] bugfixes+partitioning for dataflow build

* [Build] support from/to steps, add some verbosity

* [Build] use explicit strings for config enums

* [Deps] add clize and dataclasses-json

* [Build] add cmdline entry for building folder, mixin json to cfg

* [Build] cd into specified dir for build_dataflow

* [Infra] add new build_dataflow entrypoint to run_docker.sh

* [Build] let Python do exception handling in build_dataflow

* [Infra] add new run-docker.sh entrypoint for build_custom

* [Deps, Infra] update finn-base, set FINN_BUILD_DIR envvar

* [Test] fix manual /tmp usage in tests

* [Infra] avoid manual setting of build dir for now

breaks in IP stitching for some reason

* [Docs, Build] rename to build_dataflow + add some docs

* [GHA] fix missing env.var.

* [Build] allow specifying steps by name

* [Build] add logging support in build_dataflow

* [Zynq] use impl resources, add close_project

still looking for ways around Vivado randomly hanging and not exiting 
after synth finish

* [Build] make more outputs available from build_dataflow

* [Zynq] use vivado -batch for tcl call to synth

* [Deps] update pyverilator

* [Build] use abspath

* [Test] add test_build_dataflow_directory

* [Build] add build.py example

* [Docs] add docs about command line entry

* [Setup] include finn-base in install_requires

this is needed to build readthedocs properly

* Added transform to set mem modes

* Add transform to set folding (SIMD/PE)

* Implemented resource allocation transform and test

* Reverted to version in dev

* Updated expected resource counts in res estimate test

* Added URAM and DSP resource estimates; changed FC layer resType to lut/dsp, made it optional, and made lut the default

* Correct handling of URAM

* Fixed resource estimation for fc layer

* Fixed uram estimation in SWU

* Fixed res estimate test

* Added resource estimation to VVAU, and changed resType to same pattern in FClayer; fixed DSP estimation in FClayer

* Fixes for VVAU resource estimation

* Updated SWU memory estimate; modified folding transform for correct depthwise SWU folding

* Moved folding transforms out of PR branch

* Removed files added by mistake in merge

* Fixed test

* [Deps, Refactor] update finn-base, move create.py back into finn

* [Deps] update finn-base to get optional, restricted-value attributes

* [HLSCustomOp] specify allowed values for HLSCustomOps where appropriate

* [Deps] update finn-base and Brevitas

Co-authored-by: Yaman Umuroglu <maltanar@gmail.com>

* [Refactor] use getCustomOp instead of direct registry access

* [Refactor] move HLSCustomOp base to own file

* [Refactor] register all HLSCustomOps in new style

* [Refactor] use correct domain for custom ops acc. to new style

* [Deps] update finn-base to get new-style customop domains

* [Refactor] more domain fixes

* [Test] fix ipstitch expected io values in rtlsim

* [Deps] update finn-base and brevitas

* [Docs] link to CustomOp reorg PR

Updated stitching transform; updated other transforms as a result of changing input/output_names to s_axis_* and m_axis_*