Commits · 96fc4f57670811fafe1753a63bf0ccfc521da077 · streichg / Finn · GitLab

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Oct 21, 2022
- [Pad] use contiguous, 4b-aligned config addrs for RTL variant · 79d64148
  Yaman Umuroglu authored 2 years ago
  
  79d64148
Oct 17, 2022
- [Pad] typo fix in template · 835ba0fa
  Yaman Umuroglu authored 2 years ago
  
  835ba0fa
- [Pad] more changes to RTL inst template for Verilog compatibility · 43a37155
  Yaman Umuroglu authored 2 years ago
  
  43a37155
Oct 16, 2022
- [Pad] switch top-level template SystemVerilog->Verilog · cb0bf3cb
  Yaman Umuroglu authored 2 years ago
  
  this keeps Vivado happy for interface inference for blocks
  cb0bf3cb
Oct 14, 2022
- Add sanity checking for generics. · ff348d47
  Thomas B. Preußer authored 2 years ago
  
  ff348d47
Oct 13, 2022
- [Pad] update fmpadding_rtl template · e2cc28d3
  Yaman Umuroglu authored 2 years ago
  
  e2cc28d3
- Added capability to custom-initialize dynamic parameter registers upon design configuration. · ba9a45f0
  Thomas B. Preußer authored 2 years ago
  
  ba9a45f0
Oct 12, 2022
- [FMPadding] conversion, inst template, CustomOp for FMPadding_rtl · 4f4bec7a
  Yaman Umuroglu authored 2 years ago
  
  4f4bec7a
- Added AXI-Light adapter to dynamically-sized feature map padding. · ee2748a2
  Thomas B. Preußer authored 2 years ago
  
  ee2748a2
- First prototype for dynamically sized FM padding. · cba8536a
  Thomas B. Preußer authored 2 years ago
  
  cba8536a
Oct 11, 2022
- Added AXI-Light adapter to dynamically-sized feature map padding. · 03ccfb5e
  Thomas B. Preußer authored 2 years ago
  
  03ccfb5e
Oct 10, 2022
- First prototype for dynamically sized FM padding. · c52ab50d
  Thomas B. Preußer authored 2 years ago
  
  c52ab50d