Commits · 5e0e89895a1a0c8ce246f7d17c975ff834cbc6e7 · streichg / Finn · GitLab

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Sep 16, 2022
- Address reviewer comments · 5e0e8989
  Felix Jentzsch authored 2 years ago
  
  5e0e8989
Sep 09, 2022
- Lint fix · dfb42854
  Felix Jentzsch authored 2 years ago
  
  dfb42854
- Move parallel impl. to different branch, cleanup · 57f9fecd
  Felix Jentzsch authored 2 years ago
  
  57f9fecd
Aug 24, 2022
- Restructure, basic resource estimation · f46e2d0a
  Felix Jentzsch authored 2 years ago
  
  f46e2d0a
Jul 20, 2022
- [Streamline] bugfix in MoveLinearPastEltwiseAdd · b76b79eb
  Yaman Umuroglu authored 2 years ago
  
  b76b79eb
- [HLSCustomOp] set target_dir to code_gen_dir if empty · e056b638
  auphelia authored 2 years ago
  
  e056b638
- [QONNX] Remove forking act. restriction for QONNX->FINN-ONNX, works fine · cc643866
  Yaman Umuroglu authored 2 years ago
  
  cc643866
- [Streamline] simplify and improve AbsorbConsecutiveTransposes · a8bb9754
  Yaman Umuroglu authored 2 years ago
  
  a8bb9754
Jul 19, 2022
- [Streamline] allow MoveOpPastFork to copy attributes, impl for Transpose · cbdc575e
  Yaman Umuroglu authored 2 years ago
  
  cbdc575e
- [Build] New flag "verbose" to control build_dataflow verbosity · b70659cb
  Yaman Umuroglu authored 2 years ago
  
  b70659cb
- [QONNX] remove no-fork restriction for QONNX->FINN-ONNX conversion · 84669619
  Yaman Umuroglu authored 2 years ago
  
  84669619
Jul 14, 2022
- [Upsample] add support for 1D upsampling · c9e49ed0
  Yaman Umuroglu authored 2 years ago
  
  c9e49ed0
- [HLSCustomOp] add optional target_dir arg for inp2npy · 362601ed
  Yaman Umuroglu authored 2 years ago
  
  362601ed
- Revert "Merge pull request #637 from Xilinx/dev" · 963fde53
  auphelia authored 2 years ago
  
  This reverts commit fe4a150c, reversing changes made to c98c2211.
  963fde53
- Revert "Merge branch 'main' into dev" · 78f6538e
  auphelia authored 2 years ago
  
  This reverts commit ed0e9698, reversing changes made to 734d1bd4.
  78f6538e
Jul 13, 2022
- [QONNX] use conv output shape for conv layer conversion · e55cc05e
  Yaman Umuroglu authored 2 years ago
  
  e55cc05e
- Fix linting · 090394e0
  Felix Jentzsch authored 2 years ago
  
  090394e0
- Fix OOC synth, add System Verilog support · 1e80caff
  Felix Jentzsch authored 2 years ago
  
  1e80caff
- Fix FIFO OOC synth · b5dccf0f
  Felix Jentzsch authored 2 years ago
  
  b5dccf0f
Jul 12, 2022
- Fixes for tests, ooc synth, clocking · 7fd6a640
  Felix Jentzsch authored 2 years ago
  
  7fd6a640
- FINN-13: Change default U250 platform to align with 2022.1 supported platforms · b1445a16
  Fionn O'Donohoe authored 2 years ago
  
  Signed-off-by: Fionn O'Donohoe <fionno@xilinx.com>
  b1445a16
- [Test] fix Mb/s -> MB/s in throughput end2end test · 9578bbc7
  Yaman Umuroglu authored 2 years ago
  
  9578bbc7
- [Driver] add missing init.py files to generated folder, fix MB typo · 10f60496
  Yaman Umuroglu authored 2 years ago
  
  10f60496
Jul 11, 2022
- [Builder] Change signature attribute to list · 2f705062
  auphelia authored 2 years ago
  
  2f705062
Jul 08, 2022
- [custom_op]: added warning for cycle estimation & minor adjustment to estimation · 025215d8
  mmrahorovic authored 2 years ago
  
  025215d8
- [custom_op]: add warning for incorrect FINN cycle estimation · ef967759
  mmrahorovic authored 2 years ago
  
  ef967759
Jul 06, 2022
- Fix stitched ip sim, add builder cfg · 91a64c2b
  Felix Jentzsch authored 2 years ago
  
  91a64c2b
Jul 05, 2022
- Adapt to upcoming FINN release · 53ffa343
  Felix Jentzsch authored 2 years ago
  
  53ffa343
- Improve Systemverilog, extend tests · 3a2a8508
  Felix Jentzsch authored 2 years ago
  
  3a2a8508
Jun 29, 2022
- [HLS] Set hls option to vitis_hls · 054a6f38
  auphelia authored 2 years ago
  
  054a6f38
- [Refactor] Change copyright header · 7750fbb0
  auphelia authored 2 years ago
  
  7750fbb0
Jun 28, 2022
- Revert "Merge branch 'dev' into main" · c98c2211
  auphelia authored 2 years ago
  
  This reverts commit 00aa2898, reversing changes made to 39376a94.
  c98c2211
Jun 27, 2022
- [Test] Add write/read test for checksum layer drain · 607551b8
  auphelia authored 2 years ago
  
  607551b8
- [CustomOp] Expose drain of checksum layer for ip generation · 1b1a5d88
  auphelia authored 2 years ago
  
  1b1a5d88
- [CustomOp] Propagate changes in checksum layer to code generation · 77fce38c
  auphelia authored 2 years ago
  
  77fce38c
Jun 23, 2022
- Complete xparameters generation for multi-kernel designs. · b548a2c8
  Thomas B. Preußer authored 2 years ago
  
  b548a2c8
Jun 22, 2022
- [Stitch] fix AXI MM segment assignment · e67f4736
  Yaman Umuroglu authored 2 years ago
  
  e67f4736
- [Stitch] allow multiple AXI MM interfaces · 92532c8f
  Yaman Umuroglu authored 2 years ago
  
  92532c8f
- [IODMA] make IODMA insertion more configurable · b32ad623
  Yaman Umuroglu authored 2 years ago
  
  b32ad623
- [Lookup] AXI lite and MM only if mem_mode="external" · 168a58a6
  Yaman Umuroglu authored 2 years ago
  
  168a58a6