- Sep 23, 2022
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Hugo LE BLEVEC authored
[MakeScaleResizeNHWC] Update on test script to correct errors. Now also verifying that the transform actually happened rather than just fonctionnality
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Hugo LE BLEVEC authored
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auphelia authored
ZynqBuild: use AXI port width from part map
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auphelia authored
RTL ConvolutionInputGenerator
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auphelia authored
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- Sep 22, 2022
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auphelia authored
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- Sep 16, 2022
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Felix Jentzsch authored
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- Sep 15, 2022
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auphelia authored
Update QONNX to latest version
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- Sep 09, 2022
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Felix Jentzsch authored
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Felix Jentzsch authored
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- Sep 07, 2022
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Felix Jentzsch authored
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- Aug 24, 2022
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Felix Jentzsch authored
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Felix Jentzsch authored
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- Aug 19, 2022
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auphelia authored
Clone and install particular version of Verilator
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- Aug 18, 2022
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Le Blevec authored
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- Aug 15, 2022
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Yaman Umuroglu authored
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- Aug 08, 2022
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Yaman Umuroglu authored
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- Jul 29, 2022
- Jul 27, 2022
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auphelia authored
[actions] Update precommit version to work with Act
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Fionn O'Donohoe authored
Signed-off-by:
Fionn O'Donohoe <fionno@xilinx.com>
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- Jul 26, 2022
- Jul 25, 2022
- Jul 21, 2022
- Jul 20, 2022
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Yaman Umuroglu authored
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auphelia authored
Support 1D upsampling
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auphelia authored
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auphelia authored
[Deps] Update qonnx and set sigtools version
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Yaman Umuroglu authored
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