Merge pull request #641 from Xilinx/feature/1d_upsample (25dee47b) · Commits · streichg / Finn · GitLab

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25dee47b

Unverified Commit 25dee47b authored 2 years ago by auphelia Committed by GitHub 2 years ago

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Merge pull request #641 from Xilinx/feature/1d_upsample

Support 1D upsampling

parents abc50007 e056b638

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Changes 5

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fetch-repos.sh 1 addition, 1 deletion

fetch-repos.sh
src/finn/custom_op/fpgadataflow/hlscustomop.py 10 additions, 8 deletions

src/finn/custom_op/fpgadataflow/hlscustomop.py
src/finn/custom_op/fpgadataflow/upsampler.py 32 additions, 12 deletions

src/finn/custom_op/fpgadataflow/upsampler.py
src/finn/transformation/fpgadataflow/convert_to_hls_layers.py 12 additions, 5 deletions

...finn/transformation/fpgadataflow/convert_to_hls_layers.py
tests/fpgadataflow/test_fpgadataflow_upsampler.py 15 additions, 4 deletions

tests/fpgadataflow/test_fpgadataflow_upsampler.py

with 70 additions and 30 deletions

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