Commits · 37b1f289152ea9173e1c509d97dfe060fffa7883 · streichg / Finn

Jan 04, 2023
- Merge branch 'dev' into feature/cppverilator-fifo-rtlsim · 37b1f289
  auphelia authored 2 years ago
  
  37b1f289
Dec 29, 2022
- Merge pull request #722 from Xilinx/hotfix/ipstitch_test · 79493efb
  auphelia authored 2 years ago
  
  [Tests] Fix ipstitch test for VitisBuild
  Unverified
  
  79493efb
- [Tests] Fix ipstitch test for VitisBuild · 111c6ef0
  auphelia authored 2 years ago
  
  111c6ef0
Dec 19, 2022
- [HLSCustomOp] single-source + prep util fxns for node-by-node rtlsim · e809dab5
  Yaman Umuroglu authored 2 years ago
  
  e809dab5
- [Util] refactor verilator prep into two functions · 2c5d07fa
  Yaman Umuroglu authored 2 years ago
  
  2c5d07fa
Dec 13, 2022
- Merge pull request #719 from Xilinx/hotfix/end2end_tests · 4a6b8110
  auphelia authored 2 years ago
  
  Hotfix/end2end tests
  Unverified
  
  4a6b8110
- [Test] cover both python and cpp mode for largefifo_rtlsim · ef5aa8bc
  Yaman Umuroglu authored 2 years ago
  
  ef5aa8bc
- [Util] remove redundant code from pyverilator utils · fd9a8541
  Yaman Umuroglu authored 2 years ago
  
  fd9a8541
- [Tests] Add missing marker and clean up topk test · c60c27fb
  auphelia authored 2 years ago
  
  c60c27fb
Dec 12, 2022
- [Tests] Fix typo in ext_weights file and set verbose to true · 0d8896cf
  auphelia authored 2 years ago
  
  0d8896cf
Dec 08, 2022
- Merge branch 'dev' into feature/cppverilator-fifo-rtlsim · bc2c85a5
  Yaman Umuroglu authored 2 years ago
  
  bc2c85a5
- [VitisBuild] Reverse check for node name in ipgen and add prefix for node names in vitis build · 5bfdc0e0
  auphelia authored 2 years ago
  
  5bfdc0e0
Dec 06, 2022
- [tests] set clk period higher for bnn end2end tests · 8debc4a9
  auphelia authored 2 years ago
  
  8debc4a9
Dec 02, 2022
- [tests] Mark cybsec board tests as xfail · 82076f10
  auphelia authored 2 years ago
  
  82076f10
- [tests] Mark ext_weights board tests as xfail · d6fe28ff
  auphelia authored 2 years ago
  
  d6fe28ff
Dec 01, 2022
- Merge pull request #716 from Xilinx/hotfix/lint_flake8 · 246a5631
  auphelia authored 2 years ago
  
  [pre-commit] Update flake8 link
  Unverified
  
  246a5631
- [pre-commit] Reverse update of flake8 rev · 087f6b34
  auphelia authored 2 years ago
  
  087f6b34
- [GA] Fix python version in lintin GA · ebf54c48
  auphelia authored 2 years ago
  
  ebf54c48
- [pre-commit] Update rev version for flake8 · ad6ae42a
  auphelia authored 2 years ago
  
  ad6ae42a
- [pre-commit] Specify python for flake8 · 02b9f6de
  auphelia authored 2 years ago
  
  02b9f6de
- [pre-commit] Update flake8 link · 462b747e
  auphelia authored 2 years ago
  
  462b747e
Nov 17, 2022
- Merge pull request #712 from Xilinx/fix/attribute_renaming · 781613ed
  auphelia authored 2 years ago
  
  Minor fix to attribute naming
  Unverified
  
  781613ed
Nov 16, 2022
- [notebooks]: ensure that the new (renamed) attribute is addressed correctly · abc4ccc1
  mmrahorovic authored 2 years ago
  
  abc4ccc1
- [fix-comments]: in/outFIFODepth renamed to in/outFIFODepths · ea7518e2
  mmrahorovic authored 2 years ago
  
  ea7518e2
Nov 13, 2022

[FIFO] bugfixes+improvements in verilator fifosim template · c8b5368d

Yaman Umuroglu authored 2 years ago

- move input token counting to after clock tick
- introduce separate tracker for last seen output
- introduce (disabled by default) vcd tracing capabilities

c8b5368d

Nov 10, 2022
- [FIFO] improve C++ FIFO sizing template · 8fe057cc
  Yaman Umuroglu authored 2 years ago
  
  8fe057cc
- [FIFO] also generate compilation script for C++ FIFO sizing · 9f8cf74b
  Yaman Umuroglu authored 2 years ago
  
  9f8cf74b
- Merge branch 'dev' into feature/cppverilator-fifo-rtlsim · f4c7ca70
  Yaman Umuroglu authored 2 years ago
  
  f4c7ca70
Nov 08, 2022
- Merge pull request #711 from Xilinx/fix/vitisbuild · 1d60ec65
  auphelia authored 2 years ago
  
  [Fix] VitisBuild
  Unverified
  
  1d60ec65
Nov 07, 2022
- [Docker] Remove obsolete xrt arg in dockerfile · b23f0eb9
  auphelia authored 2 years ago
  
  b23f0eb9
- Revert "Exit Dockerfile.finn & run_docker.sh process if XRT_DEB_VERSION is not set" · a1454a31
  auphelia authored 2 years ago
  
  This reverts commit 1f17010e.
  a1454a31
- Revert "FINN-13: Version control the installed XRT version." · 803eeb53
  auphelia authored 2 years ago
  
  This reverts commit 81fefd99.
  803eeb53
- Merge branch 'dev' into feature/vitisbuild · 5420620f
  auphelia authored 2 years ago
  
  5420620f
Nov 02, 2022
- Merge pull request #709 from Xilinx/fix/end2end_bnn_test · 2d63a2a5
  auphelia authored 2 years ago
  
  [Fix] Remove obsolete transformation in end2end bnn_pynq test
  Unverified
  
  2d63a2a5
- [Tests] Remove PrepareRTLSim step from bnn test · 64d131a3
  auphelia authored 2 years ago
  
  64d131a3
- Merge pull request #707 from Xilinx/fix/noconst_streamingeltwise · becf7e51
  auphelia authored 2 years ago
  
  Skip streaming eltwise conversion if static inputs
  Unverified
  
  becf7e51
Nov 01, 2022
- Merge pull request #708 from Xilinx/hotfix/absorb_tr_resize · 442c184f
  auphelia authored 2 years ago
  
  [hotfix] for AbsorbTransposeIntoResize transformation
  Unverified
  
  442c184f
- [Streamline/Absorb] Reorder insertion/rewire of new trn node · c3083929
  auphelia authored 2 years ago
  
  c3083929
- [Convert] skip streaming eltwise conversion if static inputs · a8343b2d
  Yaman Umuroglu authored 2 years ago
  
  a8343b2d
Oct 27, 2022
- Merge pull request #705 from Xilinx/fix/FIFO · 013684a1
  auphelia authored 2 years ago
  
  Fix get dtype functions for StreamingFIFO
  Unverified
  
  013684a1

Admin message