Commits · 26715ac513c81ecae53bc8bcaa7fe6e4f0cb5081 · streichg / Finn · GitLab

Snippets Groups Projects

To receive notifications about scheduled maintenance, please subscribe to the mailing-list gitlab-operations@sympa.ethz.ch. You can subscribe to the mailing-list at https://sympa.ethz.ch

May 18, 2020
- Marked vivado dependency · 26715ac5
  Lucian Petrica authored 4 years ago
  
  26715ac5
- [Test] mark globalaccpool test as vivado · a68970dc
  Yaman Umuroglu authored 4 years ago
  
  a68970dc
May 15, 2020
- Added Addstreams HLS Op · 251449dd
  Lucian Petrica authored 4 years ago
  
  251449dd
May 14, 2020
- [Test] mark some more tests with pytest.mark.vivado · 5a02740d
  Yaman Umuroglu authored 4 years ago
  
  5a02740d
- [Test] add vivado pytest marker · cde32f03
  Yaman Umuroglu authored 4 years ago
  
  cde32f03
- Implemented GlobalAccPool HLS Op · a864e609
  Lucian Petrica authored 4 years ago
  
  a864e609
- [Test] use load_test_checkpoint_or_skip in multistep tests · 05dad1b0
  Yaman Umuroglu authored 4 years ago
  
  05dad1b0
- [Test] add slow marker to most slow-running tests · 52d8e6da
  Yaman Umuroglu authored 4 years ago
  
  52d8e6da
May 12, 2020
- [Test] Update other tests that use CreateStitchedIP transformation to use clock period as argument · 9ea3077f
  auphelia authored 4 years ago
  
  9ea3077f
May 07, 2020
- [Refactor] fix remaining npysim -> cppsim · 837b6696
  Yaman Umuroglu authored 4 years ago
  
  837b6696
- [Refactor] rename HLSSynth_IPGen to HLSSynthIP · 5e630834
  Yaman Umuroglu authored 4 years ago
  
  5e630834
- [Refactor] rename CodeGen_ipgen to PrepareIP · 130c1462
  Yaman Umuroglu authored 4 years ago
  
  130c1462
- [Refactor] rename Compile to CompileCppSim · 61b39409
  Yaman Umuroglu authored 4 years ago
  
  61b39409
- [Refactor] CodeGen_npysim is renamed to PrepareCppSim · 7f1f280e
  Yaman Umuroglu authored 4 years ago
  
  7f1f280e
- [Refactor] Codegen_ipstitch renamed to CreateStitchedIP · 619feae5
  Yaman Umuroglu authored 4 years ago
  
  619feae5
May 06, 2020
- [Test] correct value range for CIFAR-10 data, check class output · 2da9ba96
  Yaman Umuroglu authored 4 years ago
  
  thanks to @quetric for pointing this out
  2da9ba96
Apr 30, 2020
- [Test] sweep SIMD in SWG test · 28236f57
  Yaman Umuroglu authored 4 years ago
  
  28236f57
- [Test] Add throughput and execution test to streaming fifo unit test · c2d60d16
  auphelia authored 4 years ago
  
  c2d60d16
Apr 29, 2020
- [Test] respect idt for ipstitch on-PYNQ tests · 52ae0c32
  Yaman Umuroglu authored 4 years ago
  
  52ae0c32
- [Test] fix ipstitch rtlsim to account for AXI lite interface · fb5f6000
  Yaman Umuroglu authored 4 years ago
  
  fb5f6000
- [Fclk] set default frequency to 100 MHz throughout the project · fbcd29c3
  Yaman Umuroglu authored 4 years ago
  
  this will be replaced by a metadata_prop in the near future
  fbcd29c3
Apr 27, 2020
- [Test] add PrepareRTLSim call to additional fclayer test · 919d1f3c
  Yaman Umuroglu authored 5 years ago
  
  919d1f3c
- [StreamingFC] also switch to prepared rtlsim for fclayer · 0992b96a
  Yaman Umuroglu authored 5 years ago
  
  slight difference from others: needs ReplaceVerilogRelPaths
  0992b96a
Apr 26, 2020
- [HLSCustomOp] switch to cached rtlsim results for most ops + tests · 33b010c2
  Yaman Umuroglu authored 5 years ago
  
  33b010c2
Apr 23, 2020
- [Test] Add port to DeployToPYNQ trafo in tests · 746b1fc5
  auphelia authored 5 years ago
  
  746b1fc5
Apr 22, 2020
- [Test] Add new test for streaming fclayer decoupled mode with mh=mw=128 · fa1d6f7b
  auphelia authored 5 years ago
  
  fa1d6f7b
Apr 20, 2020
- [Test] Add transformations to run network with one streaming FIFO node on pynq board · 5bc12e2b
  auphelia authored 5 years ago
  
  5bc12e2b
Apr 09, 2020
- [StreamingFIFO & Test] Add ip packing for streaming fifo and add test · d3d47a22
  auphelia authored 5 years ago
  
  d3d47a22
Apr 08, 2020
- [Test] fix test_res_estimate for new dict format · 6ec27095
  Yaman Umuroglu authored 5 years ago
  
  6ec27095
- [Test] skip loading dependent models if test skipped · 6da1ec08
  Yaman Umuroglu authored 5 years ago
  
  6da1ec08
- [Test] Add test for single streaming fifo node · eb4ea143
  auphelia authored 5 years ago
  
  eb4ea143
Mar 31, 2020
- [Test] grow matrix size and large int dtype for StreamingFC test · f19183cf
  Yaman Umuroglu authored 5 years ago
  
  f19183cf
- [Test] Add test for streaming dwc · fe2dfa99
  auphelia authored 5 years ago
  
  fe2dfa99
Mar 30, 2020
- [Test] bring back random input to ip stitch test · 20414ce7
  Yaman Umuroglu authored 5 years ago
  
  20414ce7
- [Test] debug changes to ip stitch test · 825cb51a
  Yaman Umuroglu authored 5 years ago
  
  825cb51a
Mar 27, 2020
- [Test] switch to 2-FC stitching testcase · 37e22c88
  Yaman Umuroglu authored 5 years ago
  
  37e22c88
- [Test] fix IP stitching tests w/ ReplaceVerilogRelPaths · e9956b93
  Yaman Umuroglu authored 5 years ago
  
  e9956b93
Mar 26, 2020
- [Test] add final checks to cnv-w1a1 HLS conversion · 10365f8f
  Yaman Umuroglu authored 5 years ago
  
  10365f8f
- [Test] add InferQuantizedStreamingFCLayer to cnv-w1a1 HLS conv · 5704780c
  Yaman Umuroglu authored 5 years ago
  
  5704780c
- [Test] simplify cnv-w1a1 HLS conv test by 2nd streamline call · f2dd151b
  Yaman Umuroglu authored 5 years ago
  
  f2dd151b