[Fclk] set default frequency to 100 MHz throughout the project (fbcd29c3) · Commits · streichg / Finn · GitLab

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fbcd29c3

Commit fbcd29c3 authored 4 years ago by Yaman Umuroglu

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[Fclk] set default frequency to 100 MHz throughout the project

this will be replaced by a metadata_prop in the near future

parent 47210771

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notebooks/end2end_example/tfc_end2end_example.ipynb 1 addition, 1 deletion

notebooks/end2end_example/tfc_end2end_example.ipynb
src/finn/transformation/fpgadataflow/codegen_ipstitch.py 2 additions, 1 deletion

src/finn/transformation/fpgadataflow/codegen_ipstitch.py
src/finn/transformation/fpgadataflow/make_pynq_proj.py 1 addition, 1 deletion

src/finn/transformation/fpgadataflow/make_pynq_proj.py
tests/end2end/test_end2end_cnv_w1a1.py 1 addition, 1 deletion

tests/end2end/test_end2end_cnv_w1a1.py
tests/end2end/test_end2end_tfc_w1a1_throughput_test.py 1 addition, 1 deletion

tests/end2end/test_end2end_tfc_w1a1_throughput_test.py
tests/end2end/test_end2end_tfc_w1a2.py 1 addition, 1 deletion

tests/end2end/test_end2end_tfc_w1a2.py
tests/end2end/test_end2end_tfc_w2a2.py 1 addition, 1 deletion

tests/end2end/test_end2end_tfc_w2a2.py
tests/fpgadataflow/test_fpgadataflow_fifo.py 1 addition, 1 deletion

tests/fpgadataflow/test_fpgadataflow_fifo.py

with 9 additions and 8 deletions

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