Commits · fd9a8541977450208818abfe1efd05ab2a5a4a42 · streichg / Finn

Dec 13, 2022
- [Util] remove redundant code from pyverilator utils · fd9a8541
  Yaman Umuroglu authored 2 years ago
  
  fd9a8541
Nov 16, 2022
- [fix-comments]: in/outFIFODepth renamed to in/outFIFODepths · ea7518e2
  mmrahorovic authored 2 years ago
  
  ea7518e2
Nov 13, 2022

[FIFO] bugfixes+improvements in verilator fifosim template · c8b5368d

Yaman Umuroglu authored 2 years ago

- move input token counting to after clock tick
- introduce separate tracker for last seen output
- introduce (disabled by default) vcd tracing capabilities

c8b5368d

Nov 10, 2022
- [FIFO] improve C++ FIFO sizing template · 8fe057cc
  Yaman Umuroglu authored 2 years ago
  
  8fe057cc
- [FIFO] also generate compilation script for C++ FIFO sizing · 9f8cf74b
  Yaman Umuroglu authored 2 years ago
  
  9f8cf74b
Nov 01, 2022
- [Streamline/Absorb] Reorder insertion/rewire of new trn node · c3083929
  auphelia authored 2 years ago
  
  c3083929
- [Convert] skip streaming eltwise conversion if static inputs · a8343b2d
  Yaman Umuroglu authored 2 years ago
  
  a8343b2d
Oct 27, 2022
- [CustomOp] Add dtype functions to StreamingFIFO · ad6319d5
  auphelia authored 2 years ago
  
  ad6319d5
Oct 24, 2022
- [CustomOp] Delete stream depth pragmas for in/out streams in MVAU and VVAUs · 5d8a0260
  auphelia authored 2 years ago
  
  5d8a0260
Oct 21, 2022
- [Transform] Extend inFIFODepths for extw nodes · c7c15b7c
  auphelia authored 2 years ago
  
  c7c15b7c
Oct 07, 2022
- [EltWise] Change order for node attribute update · a799fe85
  auphelia authored 2 years ago
  
  a799fe85
- [EltWise] Add node attribute for inFIFODepths · 01a62e7f
  auphelia authored 2 years ago
  
  01a62e7f
Oct 06, 2022
- [Refactor] Minor fixes on code · c0dc4af4
  auphelia authored 2 years ago
  
  c0dc4af4
- [CustomOp] Update fmpadding to new hls code · 4c0978e8
  auphelia authored 2 years ago
  
  4c0978e8
Oct 05, 2022
- [CustomOp] Remove overwriting of default FIFO sizes · 72ded22a
  auphelia authored 2 years ago
  
  72ded22a
- [CustomOps] Add missing indices in shape/datatype fcts · 392052b1
  auphelia authored 2 years ago
  
  392052b1
Oct 04, 2022
- [Util] Add comment about usage of axis infrastructure vh · 1ce5af77
  auphelia authored 2 years ago
  
  1ce5af77
- [Stitch] explicitly mark finn_design as top level · acefb525
  Yaman Umuroglu authored 2 years ago
  
  acefb525
Sep 29, 2022
- [FIFO] don't round-up sizes to 2^x, StreamingFIFO does it dynamically · efcc83a4
  Yaman Umuroglu authored 2 years ago
  
  efcc83a4
- [FIFO] small bugfix in input txn counting · 8f6a22ac
  Yaman Umuroglu authored 2 years ago
  
  8f6a22ac
Sep 28, 2022
- [Build] enable using C++ fifosim for rtlsim perf measurement · 59b19dd3
  Yaman Umuroglu authored 2 years ago
  
  59b19dd3
- [FIFO] keep perf metric dict keys consistent in C++ fifo sim · 8c5f1aaa
  Yaman Umuroglu authored 2 years ago
  
  8c5f1aaa
- Revert "Revert "Merge branch 'feature/rtlsim-vivado-ip' into feature/new-fifo-sizing-residual"" · 04217956
  Yaman Umuroglu authored 2 years ago
  
  This reverts commit fc9e880a.
  04217956
- Revert "Revert "Merge branch 'feature/rtlsim-vivado-ip' into feature/new-fifo-sizing-residual"" · 9c6651f7
  Yaman Umuroglu authored 2 years ago
  
  This reverts commit fc9e880a.
  9c6651f7
Sep 27, 2022
- [FIFO] add new build option to enable C++-based FIFO sizing · 56057926
  Yaman Umuroglu authored 2 years ago
  
  56057926
- [FIFO] add new verilator_fifosim util function to call C++ rtlsim · f9d86f40
  Yaman Umuroglu authored 2 years ago
  
  f9d86f40
- [FIFO] C++ template for faster rtlsim with verilator · 8bfedbe8
  Yaman Umuroglu authored 2 years ago
  
  8bfedbe8
Sep 26, 2022
- [customOp] Temp. reverse changes to checksum axilite interface name · 584f0fb5
  auphelia authored 2 years ago
  
  584f0fb5
Sep 23, 2022
- [customOp] Fix typo in eltwise customOp · edf0a91e
  auphelia authored 2 years ago
  
  edf0a91e
- [CustomOp] Add comments to convinputgen rtl · 77f07339
  auphelia authored 2 years ago
  
  77f07339
Sep 22, 2022
- [Style] Minor style fixes to added components · fdb00bb5
  auphelia authored 2 years ago
  
  fdb00bb5
- [Refactor] fix fifo depths property for concat layers at conversion time · 5b1b2ebe
  Yaman Umuroglu authored 2 years ago
  
  5b1b2ebe
- [Refactor] add missing ind param to Checksum HLSCustomOp · 6933d080
  Yaman Umuroglu authored 2 years ago
  
  6933d080
- [FIFO] simplifying idt retrival after refactor · 9375e30d
  Yaman Umuroglu authored 2 years ago
  
  9375e30d
- [Refactor] add optional ind=0 argument to HLSCustomOp stream properties · 3f2d6d97
  Yaman Umuroglu authored 2 years ago
  
  3f2d6d97
- [Refactor] typo fix in DeriveFIFOSizes · 06f9f81a
  Yaman Umuroglu authored 2 years ago
  
  06f9f81a
- [Refactor] remove remaining outFIFODepth refs · ab8fe1e2
  Yaman Umuroglu authored 2 years ago
  
  ab8fe1e2
- [Refactor] deprecate singuler in/outFIFODepth: in/outFIFODepths only · 394d1fa2
  Yaman Umuroglu authored 2 years ago
  
  394d1fa2
Sep 20, 2022
- [InsertDWC] use impl_style=vivado if widths not divisible · d4e91a19
  Yaman Umuroglu authored 2 years ago
  
  d4e91a19
- [FIFO] instead of fixed-depth large FIFO in sim, use tensor size · 6ccc9499
  Yaman Umuroglu authored 2 years ago
  
  6ccc9499

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