Commits · bce0e6ca2bd2f72abae19eefcb81d3d48e0d8c74 · streichg / Finn · GitLab

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Aug 26, 2022
- [FIFO] try sizing bypass FIFOs with a new approach · bce0e6ca
  Yaman Umuroglu authored 2 years ago
  
  bce0e6ca
- [Test] add residual FIFO sizing testcase, path needs fix · 5356ace5
  Yaman Umuroglu authored 2 years ago
  
  5356ace5
Aug 25, 2022
- Revert "Merge branch 'feature/rtlsim-vivado-ip' into feature/new-fifo-sizing-residual" · fc9e880a
  Yaman Umuroglu authored 2 years ago
  
  This reverts commit 0297b55f, reversing changes made to b3110eec.
  fc9e880a
- [Build] adjust chrc FIFO sizing for new InsertFIFO behavior · 4ca27c4a
  Yaman Umuroglu authored 2 years ago
  
  4ca27c4a
- [InsertFIFO] change default value of max_qsrl_depth to None · 7ab67946
  Yaman Umuroglu authored 2 years ago
  
  7ab67946
- Merge branch 'feature/rtlsim-vivado-ip' into feature/new-fifo-sizing-residual · 0297b55f
  Yaman Umuroglu authored 2 years ago
  
  0297b55f
- Merge branch 'dev' into feature/new-fifo-sizing-residual · b3110eec
  Yaman Umuroglu authored 2 years ago
  
  b3110eec
- [rtlsim] add custom variant of axis_infrastructure.vh · e7d58388
  Yaman Umuroglu authored 2 years ago
  
  e7d58388
- [Build] add option (enabled) to keep impl_style=vivado for rtlsim · e1d09b95
  Yaman Umuroglu authored 2 years ago
  
  e1d09b95
- [rtlsim] experimental support for impl_style=vivado FIFO and DWC sim · 0b158c2e
  Yaman Umuroglu authored 2 years ago
  
  0b158c2e
- [Deps] update pyverilator and verilator · c50b3482
  Yaman Umuroglu authored 2 years ago
  
  c50b3482
- [Deps] update pyverilator · 8268ec25
  Yaman Umuroglu authored 2 years ago
  
  8268ec25
Aug 24, 2022
- [Build] small fixes to new FIFO sizing integration · d2b0d7be
  Yaman Umuroglu authored 2 years ago
  
  d2b0d7be
- [Stitch] print failing dir if IP stitch fails · c1ce443e
  Yaman Umuroglu authored 2 years ago
  
  c1ce443e
- [Build] add new option and logic for chrc-based auto FIFO sizing · f6ee5365
  Yaman Umuroglu authored 2 years ago
  
  f6ee5365
- [InsertFIFO] add optional args for max QSRL depth and ram_style · d299636d
  Yaman Umuroglu authored 2 years ago
  
  d299636d
- [FIFO] round up depth to power-of-2 for impl_style=vivado · d04e15ab
  Yaman Umuroglu authored 2 years ago
  
  d04e15ab
- [FIFO] Speed up DeriveFIFOSizes considerably with numpy · fe457fab
  Yaman Umuroglu authored 2 years ago
  
  fe457fab
Aug 19, 2022
- Merge pull request #668 from Xilinx/feature/manual-verilator-install · df9aa4a4
  auphelia authored 2 years ago
  
  Clone and install particular version of Verilator
  Unverified
  
  df9aa4a4
Aug 15, 2022
- [Deps] manually clone and install particular verilator version · aa228f23
  Yaman Umuroglu authored 2 years ago
  
  aa228f23
Aug 12, 2022
- [Test] generalize fifosizing test to enable more nets · bea06b8a
  Yaman Umuroglu authored 2 years ago
  
  bea06b8a
- [FIFO] handle weight reps correctly for decoupled mode · 0242e6fe
  Yaman Umuroglu authored 2 years ago
  
  0242e6fe
- [Test] switch to new DeriveFIFOSizes · 067e6744
  Yaman Umuroglu authored 2 years ago
  
  067e6744
- [FIFO] Add DeriveFIFOSizes as NodeLocalTransformation · 1292fd5c
  Yaman Umuroglu authored 2 years ago
  
  1292fd5c
- [Deps] update QONNX · d765762d
  Yaman Umuroglu authored 2 years ago
  
  d765762d
Aug 11, 2022
- [FIFO] allow skipping nodes with existing characteristic · 45a730ed
  Yaman Umuroglu authored 2 years ago
  
  45a730ed
- [Test] flesh out new FIFO sizing test · 7233107e
  Yaman Umuroglu authored 2 years ago
  
  7233107e
- [FIFO] support characterizing components with decoupled mode weights · a88d25b6
  Yaman Umuroglu authored 2 years ago
  
  a88d25b6
- [FIFO] also do accumulation as part of DeriveCharacteristic · e05154e6
  Yaman Umuroglu authored 2 years ago
  
  e05154e6
- [Test] add first sketch for FIFO sizing end2end test · d5292fcb
  Yaman Umuroglu authored 2 years ago
  
  d5292fcb
Aug 10, 2022
- [FIFO] fix boundary condition in DeriveCharacteristic · a8428677
  Yaman Umuroglu authored 2 years ago
  
  a8428677
Aug 09, 2022
- [Test] flesh out FIFO characterizatio test for MVAU · c3e01a5d
  Yaman Umuroglu authored 2 years ago
  
  c3e01a5d
- [FIFO] bugfix: add reset, extra checks · 20d0b6b4
  Yaman Umuroglu authored 2 years ago
  
  20d0b6b4
- [HLSCustomOp] add missing attribute for characterization period · b778d53a
  Yaman Umuroglu authored 2 years ago
  
  b778d53a
Jul 29, 2022
- Merge pull request #647 from Xilinx/feature/builder_verbose · 09bec2fe
  auphelia authored 2 years ago
  
  [Build] New flag "verbose" to control build_dataflow verbosity
  Unverified
  
  09bec2fe
- Merge branch 'dev' into feature/builder_verbose · ffa1b3db
  auphelia authored 2 years ago
  
  ffa1b3db
- Merge pull request #646 from Xilinx/fix/qonnx_quant_conv_bias · a13faced
  auphelia authored 2 years ago
  
  Improvements to QONNX -> FINN-ONNX conversion
  Unverified
  
  a13faced
- [Test] add test_fclayer_fifocharacterize · 77f31912
  Yaman Umuroglu authored 2 years ago
  
  77f31912
- [FIFO] bugfix in DeriveCharacteristic · 8fbb609c
  Yaman Umuroglu authored 2 years ago
  
  8fbb609c
Jul 28, 2022
- [FIFO] Introduce new DeriveCharacteristic transform · fe2ea73c
  Yaman Umuroglu authored 2 years ago
  
  fe2ea73c