Commits · 9ffb8cf54c4640b4fcfc97170abd0df5dcd86c18 · streichg / Finn · GitLab

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Sep 11, 2020
- [Util] do test checkpoint load/skip differently · 5711b578
  Yaman Umuroglu authored 4 years ago
  
  5711b578
- [Core] execute DoubleToSingleFloat prior to transforms · 985d21d7
  Yaman Umuroglu authored 4 years ago
  
  985d21d7
- [Transformation] comment + check empty name in GiveReadableTensorNames · 330d4b1a
  Yaman Umuroglu authored 4 years ago
  
  330d4b1a
Sep 10, 2020
- [Refactor] ReplaceVerilogRelPaths called automatically · 1ca32bb6
  Yaman Umuroglu authored 4 years ago
  
  1ca32bb6
- [Transform] always call ReplaceVerilogRelPaths before PrepareRTLSim · dbc65ece
  Yaman Umuroglu authored 4 years ago
  
  dbc65ece
- [StreamingFC] bring back IPI codegen for mem_mode=const -- ouchie · 6957b096
  Yaman Umuroglu authored 4 years ago
  
  6957b096
- [Refactor] remove references to old "zynq" platform · a7b2224c
  Yaman Umuroglu authored 4 years ago
  
  a7b2224c
- [PYNQ, Test] remove old PYNQ build method and tests for it · f8b8d635
  Yaman Umuroglu authored 4 years ago
  
  f8b8d635
Sep 04, 2020
- Using list tiling instead of np.tile to avoid conversion to float · c2f9b93f
  Lucian Petrica authored 4 years ago
  
  c2f9b93f
- Update out bitwidth saturation type · a5422250
  Tobi-Alonso authored 4 years ago
  
  a5422250
- [fpgadataflow] Fix tensor element bitwidth missmatch for labelselect_batch and channelwise_op_batch · 96179ebe
  Tobi-Alonso authored 4 years ago
  
  96179ebe
- Fixed rtlsim (node-by-node and stitched) for decoupled memories · cf25f7e1
  Lucian Petrica authored 4 years ago
  
  cf25f7e1
Sep 03, 2020
- [Driver] don't use cacheable for Alveo driver · 1527a1c8
  Yaman Umuroglu authored 4 years ago
  
  1527a1c8
- [Refactor] move some functions to test utils · d9e0a722
  Yaman Umuroglu authored 4 years ago
  
  d9e0a722
- [Analysis] clarify critical_path_cycles · bbb5abee
  Yaman Umuroglu authored 4 years ago
  
  bbb5abee
- [Core] save rtlsim sdp model after exec · f29b452a
  Yaman Umuroglu authored 4 years ago
  
  f29b452a
- [Analysis] introduce dataflow_performance to extract key perf info · fc1f12dd
  Yaman Umuroglu authored 4 years ago
  
  fc1f12dd
Sep 02, 2020
- [Transform] don't run PrepareIP on nodes with output products · 6058ff13
  Yaman Umuroglu authored 4 years ago
  
  6058ff13
- [Transform] don't run HLSSynthIP on nodes with output products · 709fa09b
  Yaman Umuroglu authored 4 years ago
  
  709fa09b
Aug 31, 2020
- Added resource estimation to DWC and FIFO · 1d2efd94
  Lucian Petrica authored 4 years ago
  
  1d2efd94
Aug 30, 2020
- [Driver] common flush/invalidate for all platforms · b2eb75b8
  Yaman Umuroglu authored 4 years ago
  
  b2eb75b8
- [Ultra96] board files + synth fix · ebf0f919
  Yaman Umuroglu authored 4 years ago
  
  ebf0f919
Aug 27, 2020
- [Zynq] fix ZynqBuild link script for UltraScale+ parts · cf86258f
  Yaman Umuroglu authored 4 years ago
  
  cf86258f
- [Debug] move to new Brevitas debug infra, remove hook from FINN · 6cbc7b04
  Yaman Umuroglu authored 4 years ago
  
  6cbc7b04
- [VVAU] fix instream width · 9102499f
  Yaman Umuroglu authored 4 years ago
  
  9102499f
Aug 25, 2020
- [Analysis] report post-synth top resources too, annotate as own metadata_prop · d049f6b4
  Yaman Umuroglu authored 4 years ago
  
  d049f6b4
- [Build] set platform metadata_prop for partitions too · 3fbf9d49
  Yaman Umuroglu authored 4 years ago
  
  3fbf9d49
Aug 24, 2020
- [Util] support logging QuantTensors in forward hook · b4e09c46
  Yaman Umuroglu authored 4 years ago
  
  b4e09c46
- [Doc] update docstring for AnnotateResources · d1caa2cb
  Yaman Umuroglu authored 4 years ago
  
  d1caa2cb
- [Analysis] bugfix in post_synth_res · 772ae66d
  Yaman Umuroglu authored 4 years ago
  
  772ae66d
- [Analysis] handle Vitis post synth res differently · 7df5b7ef
  Yaman Umuroglu authored 4 years ago
  
  7df5b7ef
Aug 23, 2020
- [Vitis] fix typo in gen xml tcl template · 34785483
  Yaman Umuroglu authored 4 years ago
  
  34785483
- [Vitis] fix xml rep tcl gen · ff2bdea4
  Yaman Umuroglu authored 4 years ago
  
  ff2bdea4
- [Vitis] generate xml report after VitisLink · 1c80a405
  Yaman Umuroglu authored 4 years ago
  
  1c80a405
- [Vitis] allow specifying opt strategy + use quick for tests · 5924f630
  Yaman Umuroglu authored 4 years ago
  
  5924f630
Aug 21, 2020
- [Core] fix typo in Alveo remote exec · bfac58cd
  Yaman Umuroglu authored 4 years ago
  
  bfac58cd
- Implemented option of creating per-layer heirarchical block design; applied to... · 34278e8c
  Lucian Petrica authored 4 years ago
  
  Implemented option of creating per-layer heirarchical block design; applied to decoupled FClayer, FIFO, and DWC
  34278e8c
Aug 20, 2020
- [Vitis] fix default paths, source XRT on entry if exists · d59a8c89
  Yaman Umuroglu authored 4 years ago
  
  d59a8c89
- [Refactor] VITIS_XRT -> XILINX_XRT · 5a7a3cfe
  Yaman Umuroglu authored 4 years ago
  
  5a7a3cfe
- [Alveo] working remote_exec on Alveo · f92926a8
  Yaman Umuroglu authored 4 years ago
  
  f92926a8