Commits · 84a6e9b378497b5cb767d64ae228f4a42478219d · streichg / Finn · GitLab

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Sep 20, 2022
- [FIFO] instead of fixed-depth large FIFO in sim, use tensor size · 6ccc9499
  Yaman Umuroglu authored 2 years ago
  
  6ccc9499
- [FIFO] instead of fixed-depth large FIFO in sim, use tensor size · 20e4613f
  Yaman Umuroglu authored 2 years ago
  
  20e4613f
Sep 19, 2022
- [FIFO] use hw maxcount monitoring in InsertAndSetFIFODepths · 81f010b8
  Yaman Umuroglu authored 2 years ago
  
  81f010b8
- [FIFO] add hw maxcount tracking to rtl FIFOs with opt attribute · e8f7c756
  Yaman Umuroglu authored 2 years ago
  
  e8f7c756
Sep 09, 2022
- [pre-commit] Run pre-commit on lookup layer file · 91e3df89
  auphelia authored 2 years ago
  
  91e3df89
- Rebalanced lookup implementation code to go mostly into header file. · 8408b45a
  Thomas B. Preußer authored 2 years ago
  
  8408b45a
Sep 08, 2022
- Maintain static OOB count internally requiring explicit acknowledging reset. · ae2f76c3
  Thomas B. Preußer authored 2 years ago
  
  ae2f76c3
Aug 25, 2022
- [rtlsim] add custom variant of axis_infrastructure.vh · e7d58388
  Yaman Umuroglu authored 2 years ago
  
  e7d58388
- [Build] add option (enabled) to keep impl_style=vivado for rtlsim · e1d09b95
  Yaman Umuroglu authored 2 years ago
  
  e1d09b95
- [rtlsim] experimental support for impl_style=vivado FIFO and DWC sim · 0b158c2e
  Yaman Umuroglu authored 2 years ago
  
  0b158c2e
Aug 22, 2022
- [HLSCustomOp] Adding ap_none interface string · 2afe6ece
  auphelia authored 2 years ago
  
  2afe6ece
Aug 19, 2022
- [IP stitch] make new lookup layer output external · e73a0719
  auphelia authored 2 years ago
  
  e73a0719
Aug 11, 2022
- Add IRQ signalling output for input bounds violation (to be externalized). · 4c04af8d
  Thomas B. Preußer authored 2 years ago
  
  4c04af8d
Aug 09, 2022
- [LookUp layer] Fix typo in pragma insertion · 162d0f26
  auphelia authored 2 years ago
  
  162d0f26
- [LookUp layer] Change hls implementation of LU external · 5ade63a9
  auphelia authored 2 years ago
  
  5ade63a9
Jul 20, 2022
- [Streamline] bugfix in MoveLinearPastEltwiseAdd · b76b79eb
  Yaman Umuroglu authored 2 years ago
  
  b76b79eb
- [HLSCustomOp] set target_dir to code_gen_dir if empty · e056b638
  auphelia authored 2 years ago
  
  e056b638
- [QONNX] Remove forking act. restriction for QONNX->FINN-ONNX, works fine · cc643866
  Yaman Umuroglu authored 2 years ago
  
  cc643866
- [Streamline] simplify and improve AbsorbConsecutiveTransposes · a8bb9754
  Yaman Umuroglu authored 2 years ago
  
  a8bb9754
Jul 19, 2022
- [Streamline] allow MoveOpPastFork to copy attributes, impl for Transpose · cbdc575e
  Yaman Umuroglu authored 2 years ago
  
  cbdc575e
- [Build] New flag "verbose" to control build_dataflow verbosity · b70659cb
  Yaman Umuroglu authored 2 years ago
  
  b70659cb
- [QONNX] remove no-fork restriction for QONNX->FINN-ONNX conversion · 84669619
  Yaman Umuroglu authored 2 years ago
  
  84669619
Jul 14, 2022
- [Upsample] add support for 1D upsampling · c9e49ed0
  Yaman Umuroglu authored 2 years ago
  
  c9e49ed0
- [HLSCustomOp] add optional target_dir arg for inp2npy · 362601ed
  Yaman Umuroglu authored 2 years ago
  
  362601ed
- Revert "Merge pull request #637 from Xilinx/dev" · 963fde53
  auphelia authored 2 years ago
  
  This reverts commit fe4a150c, reversing changes made to c98c2211.
  963fde53
- Revert "Merge branch 'main' into dev" · 78f6538e
  auphelia authored 2 years ago
  
  This reverts commit ed0e9698, reversing changes made to 734d1bd4.
  78f6538e
Jul 13, 2022
- [QONNX] use conv output shape for conv layer conversion · e55cc05e
  Yaman Umuroglu authored 2 years ago
  
  e55cc05e
- Fix linting · 090394e0
  Felix Jentzsch authored 2 years ago
  
  090394e0
- Fix OOC synth, add System Verilog support · 1e80caff
  Felix Jentzsch authored 2 years ago
  
  1e80caff
Jul 12, 2022
- FINN-13: Change default U250 platform to align with 2022.1 supported platforms · b1445a16
  Fionn O'Donohoe authored 2 years ago
  
  Signed-off-by: Fionn O'Donohoe <fionno@xilinx.com>
  b1445a16
- [Test] fix Mb/s -> MB/s in throughput end2end test · 9578bbc7
  Yaman Umuroglu authored 2 years ago
  
  9578bbc7
- [Driver] add missing init.py files to generated folder, fix MB typo · 10f60496
  Yaman Umuroglu authored 2 years ago
  
  10f60496
Jul 11, 2022
- [Builder] Change signature attribute to list · 2f705062
  auphelia authored 2 years ago
  
  2f705062
Jul 08, 2022
- [custom_op]: added warning for cycle estimation & minor adjustment to estimation · 025215d8
  mmrahorovic authored 2 years ago
  
  025215d8
- [custom_op]: add warning for incorrect FINN cycle estimation · ef967759
  mmrahorovic authored 2 years ago
  
  ef967759
Jun 29, 2022
- [HLS] Set hls option to vitis_hls · 054a6f38
  auphelia authored 2 years ago
  
  054a6f38
- [Refactor] Change copyright header · 7750fbb0
  auphelia authored 2 years ago
  
  7750fbb0
Jun 28, 2022
- Revert "Merge branch 'dev' into main" · c98c2211
  auphelia authored 2 years ago
  
  This reverts commit 00aa2898, reversing changes made to 39376a94.
  c98c2211
Jun 27, 2022
- [Test] Add write/read test for checksum layer drain · 607551b8
  auphelia authored 2 years ago
  
  607551b8
- [CustomOp] Expose drain of checksum layer for ip generation · 1b1a5d88
  auphelia authored 2 years ago
  
  1b1a5d88