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Commit 2afe6ece authored by auphelia's avatar auphelia
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[HLSCustomOp] Adding ap_none interface string

parent fe9cd7db
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......@@ -138,6 +138,7 @@ class HLSCustomOp(CustomOp):
intf_names["m_axis"] = [("out_" + sname, self.get_outstream_width_padded())]
intf_names["aximm"] = []
intf_names["axilite"] = []
intf_names["ap_none"] = []
return intf_names
def get_verilog_top_filename(self):
......
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