Commits · 49c7073dc5c4be03a9a389e8c6541313041a2284 · streichg / Finn · GitLab

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Mar 08, 2022
- [Stitch] move segment assignment into CreateStitchedIP · 49c7073d
  Yaman Umuroglu authored 3 years ago
  
  49c7073d
- [Lookup] explicitly assign address range and offset for ext mem · f6a9a43d
  Yaman Umuroglu authored 3 years ago
  
  f6a9a43d
Mar 04, 2022
- [Lookup] add ip stitching ifnames + test · 0bb2f321
  Yaman Umuroglu authored 3 years ago
  
  0bb2f321
- [Lookup] first version for lookup in external memory · eabd2b71
  Yaman Umuroglu authored 3 years ago
  
  HLS parts only so far, IP stitching part yet to come
  eabd2b71
Mar 02, 2022
- [Lookup] use BRAM storage pragma for now · 0a50d8f3
  Yaman Umuroglu authored 3 years ago
  
  0a50d8f3
Mar 01, 2022
- [Stitch] call assign_bd_address in CreateStitchedIP · e37087c9
  Yaman Umuroglu authored 3 years ago
  
  e37087c9
Feb 24, 2022
- [Thresholding] enable frp, more test bugfixes · cd65e038
  Yaman Umuroglu authored 3 years ago
  
  cd65e038
- [Thresholding] some bugfixing + test improvements, more bugs left · 41e3239e
  Yaman Umuroglu authored 3 years ago
  
  41e3239e
Feb 22, 2022
- [ConvertToHLS] further constrain StreamingMaxPool conversion, add warning · 68acbf1c
  Yaman Umuroglu authored 3 years ago
  
  68acbf1c
- [StreamingMaxPool] add comments on 1d-specific attributes · d05f006d
  Yaman Umuroglu authored 3 years ago
  
  d05f006d
- [custom_op]: remainder_size is moved to hls custom-op · b3d1e843
  mmrahorovic authored 3 years ago
  
  b3d1e843
- [custom_op]: work-around for passing remainder size to HLS op · 6573d1ff
  mmrahorovic authored 3 years ago
  
  6573d1ff
Feb 20, 2022
- [transform]: change attribute handling MaxPool · c906ea0d
  mmrahorovic authored 3 years ago
  
  c906ea0d
- [transform]: InferStreamingMaxPool support for ceil mode · 5351af29
  mmrahorovic authored 3 years ago
  
  5351af29
- [custom_op]: MaxPool support for ceil mode · 898f2294
  mmrahorovic authored 3 years ago
  
  898f2294
- [transform]: support for ceil mode MaxPool · 9c2a7eea
  mmrahorovic authored 3 years ago
  
  9c2a7eea
Feb 18, 2022
- [custom_op]: corrected maxpool in/out stream width and shapes · 7b970fa8
  mmrahorovic authored 3 years ago
  
  7b970fa8
- [convert_hls]: modifications to enable 1D MaxPool layers with PE /... · 69c67c58
  mmrahorovic authored 3 years ago
  
  [convert_hls]: modifications to enable 1D MaxPool layers with PE / non-divisible pool/image dimensions
  69c67c58
Feb 17, 2022
- [custom_op]: PE-parallelism support for 1D MaxPool layers · 6e9a554f
  mmrahorovic authored 3 years ago
  
  6e9a554f
- [pre-commit]: minor changes to coding style · 1fed0b88
  mmrahorovic authored 3 years ago
  
  1fed0b88
Feb 15, 2022
- [Builder] allow passing rtlsim hook to verification · 57b047a8
  Yaman Umuroglu authored 3 years ago
  
  57b047a8
Feb 10, 2022
- [Lookup] reverse output layout + associated fixes · 40514ced
  Yaman Umuroglu authored 3 years ago
  
  40514ced
Feb 09, 2022
- temp changes · 9bcd945a
  mmrahorovic authored 3 years ago
  
  9bcd945a
Feb 01, 2022
- [Build] don't cast validation i/o data to float32 while loading · 3b10bfe5
  Yaman Umuroglu authored 3 years ago
  
  3b10bfe5
- [QONNX] support Quant -> Gather for quantized embeddings · 53277127
  Yaman Umuroglu authored 3 years ago
  
  53277127
Jan 27, 2022
- [ConvertToHLS] make 1D SWG kernel check more constrained · 2d5d5fd2
  Yaman Umuroglu authored 3 years ago
  
  2d5d5fd2
- [HLSCustomOp] update exp cycles for stride>1 1D DWS SWG · 2bcc816f
  Yaman Umuroglu authored 3 years ago
  
  2bcc816f
- [ConvertToHLS] re-enable 1D SWG DW conv with stride · 5a08858b
  Yaman Umuroglu authored 3 years ago
  
  5a08858b
- [HLSCustomOp] bring back old impl for 1D DWS SWG · d334d482
  Yaman Umuroglu authored 3 years ago
  
  d334d482
Jan 21, 2022
- [custom_op]: support for 1D SWU · 21514001
  mmrahorovic authored 3 years ago
  
  21514001
Dec 17, 2021
- [ChannelwiseOp] promote all dtypes to odt for correct add operation · 6f8040cf
  Yaman Umuroglu authored 3 years ago
  
  6f8040cf
- [Pool] correctly add all headers for codegen · d68d26bd
  Yaman Umuroglu authored 3 years ago
  
  d68d26bd
- [HLSCustomOp] adapt comp:: act types to use new template params · b1820507
  Yaman Umuroglu authored 3 years ago
  
  b1820507
Dec 16, 2021
- [custom_op]: support for 1D SWU and other small modifications · d7a5881b
  mmrahorovic authored 3 years ago
  
  d7a5881b
Dec 15, 2021
- [Pool] add activations.hpp to pool codegen includes · 27fa5582
  Yaman Umuroglu authored 3 years ago
  
  27fa5582
- [ChannelwiseOp] use cmp:: namespace for all channelwise fxns · b324c9b6
  Yaman Umuroglu authored 3 years ago
  
  b324c9b6
Dec 13, 2021
- [FC] bugfix for ext weights fifo insertion (dtype for ind!=0) · 578c8ad2
  Yaman Umuroglu authored 3 years ago
  
  578c8ad2
Nov 30, 2021
- [Vitis] try to fix iface naming for 2021.2 · 8b56f4a5
  Yaman Umuroglu authored 3 years ago
  
  8b56f4a5
- [Vitis] also add std=c++14 for HLS ip synth · 955747f1
  Yaman Umuroglu authored 3 years ago
  
  955747f1
- [Vitis] minor fixes for 2021.1 and Versal Prime parts · 91eaf3b1
  Yaman Umuroglu authored 3 years ago
  
  91eaf3b1