Merge pull request #96 from Xilinx/feature/adjusting_clk_frequency
Feature/adjusting clk frequency
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- src/finn/transformation/fpgadataflow/create_stitched_ip.py 11 additions, 3 deletionssrc/finn/transformation/fpgadataflow/create_stitched_ip.py
- src/finn/transformation/fpgadataflow/make_pynq_proj.py 10 additions, 2 deletionssrc/finn/transformation/fpgadataflow/make_pynq_proj.py
- src/finn/transformation/fpgadataflow/prepare_ip.py 0 additions, 1 deletionsrc/finn/transformation/fpgadataflow/prepare_ip.py
- tests/end2end/test_end2end_cnv_w1a1.py 1 addition, 1 deletiontests/end2end/test_end2end_cnv_w1a1.py
- tests/end2end/test_end2end_tfc_w1a1_throughput_test.py 1 addition, 1 deletiontests/end2end/test_end2end_tfc_w1a1_throughput_test.py
- tests/end2end/test_end2end_tfc_w1a2.py 1 addition, 1 deletiontests/end2end/test_end2end_tfc_w1a2.py
- tests/end2end/test_end2end_tfc_w2a2.py 1 addition, 1 deletiontests/end2end/test_end2end_tfc_w2a2.py
- tests/fpgadataflow/test_fpgadataflow_fifo.py 1 addition, 1 deletiontests/fpgadataflow/test_fpgadataflow_fifo.py
- tests/fpgadataflow/test_fpgadataflow_ip_stitch.py 1 addition, 1 deletiontests/fpgadataflow/test_fpgadataflow_ip_stitch.py
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