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Commit 8bc9f819 authored by Yaman Umuroglu's avatar Yaman Umuroglu
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[Test] fix expected rtlsim cycle counts in end2end_tfc_w1a1

parent 7da5c6cf
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......@@ -234,11 +234,11 @@ def test_end2end_tfc_w1a1_throughput_test_rtlsim():
# run through IP-stitched rtlsim with increasing batch sizes and
# check the number of cycles it takes to execute
ret = throughput_test_rtlsim(model, 1)
assert ret["cycles"] == 206
assert ret["cycles"] == 205
ret = throughput_test_rtlsim(model, 10)
assert ret["cycles"] == 845
assert ret["cycles"] == 844
ret = throughput_test_rtlsim(model, 100)
assert ret["cycles"] == 71135
assert ret["cycles"] == 7234
@pytest.mark.vivado
......
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