[ZYNQ] remove InsertTLastMarker, support stitching w/o TLastMarker

src/finn/transformation/fpgadataflow/create_stitched_ip.py

@@ -210,7 +210,8 @@ class CreateStitchedIP(Transformation):
                     assert (
                         node_inst.get_nodeattr("Direction") == "in"
                     ), """Output TLastMarker incorrect direction"""
-                elif node.op_type == "IODMA":
+                elif node.op_type == "IODMA" and len(model.graph.node) != 1:
+                    # don't apply this check for a 1-node partition
                     assert (
                         node_inst.get_nodeattr("direction") == "in"
                     ), """Input DMA incorrect direction"""
@@ -241,17 +242,11 @@ class CreateStitchedIP(Transformation):
             if model.find_consumers(node.output[0]) is None:
                 # last node in graph
                 self.connect_m_axis_external(node)
-                # ensure it is a TLastMarker to have a valid TLast signal
-                assert (
-                    node.op_type == "TLastMarker" or node.op_type == "IODMA"
-                ), """Last node is not TLastMarker or DMA.
-                Please run transformation InsertTLastMarker/InsertIODMA to ensure
-                a valid TLast signal"""
                 if node.op_type == "TLastMarker":
                     assert (
                         node_inst.get_nodeattr("Direction") == "out"
                     ), """Output TLastMarker incorrect direction"""
-                elif node.op_type == "IODMA":
+                elif node.op_type == "IODMA" and len(model.graph.node) != 1:
                     assert (
                         node_inst.get_nodeattr("direction") == "out"
                     ), """Output DMA incorrect direction"""

src/finn/transformation/fpgadataflow/make_zynq_proj.py

@@ -41,7 +41,6 @@ from finn.transformation.fpgadataflow.create_dataflow_partition import (
 )
 from finn.transformation.fpgadataflow.insert_dwc import InsertDWC
 from finn.transformation.fpgadataflow.insert_fifo import InsertFIFO
-from finn.transformation.fpgadataflow.insert_tlastmarker import InsertTLastMarker
 from finn.transformation.fpgadataflow.insert_iodma import InsertIODMA
 from finn.transformation.fpgadataflow.prepare_ip import PrepareIP
 from finn.transformation.fpgadataflow.hlssynth_ip import HLSSynthIP
@@ -297,9 +296,6 @@ class ZynqBuild(Transformation):
             dataflow_model_filename = sdp_node.get_nodeattr("model")
             kernel_model = ModelWrapper(dataflow_model_filename)
             kernel_model = kernel_model.transform(InsertFIFO())
-            kernel_model = kernel_model.transform(
-                InsertTLastMarker(both=True, external=False, dynamic=False)
-            )
             kernel_model = kernel_model.transform(GiveUniqueNodeNames())
             kernel_model.save(dataflow_model_filename)
             kernel_model = kernel_model.transform(