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Created with Raphaël 2.2.023Sep222019161514987631Aug3029262524221918151211109843129Jul282726252221201918151413121198765430Jun292827242322212017151312109872131May30252423201817161312111098654328Apr2120730Mar2825242322151411842124Feb222019181716151110983131Jan2725211322Dec211716151362130Nov2927262423201615131211108543229Oct282722212019[customOp] Fix typo in eltwise customOpMerge branch 'dev' into feature/swgg_dynamicAdd dynamic mode switchMerge branch 'dev' into feature/streaming_eltwiseMerge remote-tracking branch 'origin/dev' into feature/make_scale_resize_nhwcMerge pull request #677 from fpjentzsch/feature/fix_iodma_widthMerge pull request #607 from fpjentzsch/feature/swgg[CustomOp] Add comments to convinputgen rtl[Style] Minor style fixes to added components[FIFO] fix MVAU characterization tests[Refactor] fix fifo depths property for concat layers at conversion time[Refactor] add missing ind param to Checksum HLSCustomOp[FIFO] simplifying idt retrival after refactor[Refactor] add optional ind=0 argument to HLSCustomOp stream properties[Refactor] typo fix in DeriveFIFOSizes[Refactor] remove remaining outFIFODepth refs[Refactor] deprecate singuler in/outFIFODepth: in/outFIFODepths onlyWorking initial implementationMerge branch 'feature/rtlsim-vivado-ip' into feature/new-fifo-sizing-residualMerge branch 'feature/vitisbuild' of https://github.com/Xilinx/finn into feature/vitisbuildMerge branch 'dev' into feature/vitisbuildMerge pull request #664 from hleblevec/feature/vitisbuild[InsertDWC] use impl_style=vivado if widths not divisibleMerge branch 'feature/rtlsim-vivado-ip' of github.com:Xilinx/finn into feature/rtlsim-vivado-ip[FIFO] instead of fixed-depth large FIFO in sim, use tensor size[FIFO] instead of fixed-depth large FIFO in sim, use tensor size[FIFO] use hw maxcount monitoring in InsertAndSetFIFODepths[FIFO] add hw maxcount tracking to rtl FIFOs with opt attributeMerge branch 'feature/lookup_bounds' into feature/rtlsim-vivado-ip[Deps] update QONNXMerge branch 'dev' into feature/rtlsim-vivado-ipAddress reviewer commentsfix name in fetch repos and capitalize kv260 in templatesupdate fetch-repos.shMerge pull request #656 from Xilinx/deps/update-qonnx-versionChanges to make[Test] batch-4 inputs and result checking for test_build_dataflow[Build] keep different vcd's from batch inputs[Util] set property on SDP nodes to get full context[Build] support batched verification i/o, one at a time