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Created with Raphaël 2.2.017Aug1312111076543131Jul29282724222120171411109876532129Jun2827262524232221191817151412111098543228May27262524222120[Test] fix quicktest.sh main setting[ConvertToHLS] add missing importMerge remote-tracking branch 'origin/dev' into optimize_streamerMerge pull request #201 from Xilinx/feature/depthwise_convolution[Test] fix exp cycle readout in test_convert_to_hls_conv_layer[Test] sim_cycles -> cycles_rtlsimImplemented explicit solution for DEPTH=1 corner-caseMerge branch 'dev' into feature/depthwise_convolutionMerge pull request #212 from Xilinx/feature/annotate_cycles[Test] fix broken ZynqBuild end2end test for tfc-w1a1[ZYNQ] add high-perf Vivado synth/impl defaults[ZYNQ] build driver as part of ZynqBuild[Driver] always specify platform when generating driver[Test] call AnnotateCycles in end2end cnv-w1a1 test[Transform] add AnnotateCycles transformation[Refactor] sim_cycles -> cycles_rtlsimMerge pull request #207 from Xilinx/feature/expected_cycles_per_layer[Test] use node.name to index into expected cycles dict[Analysis] use node.name as returned dict key, comment on unique names[Pool] add parantheses around exp cycles calc[FMPadding] add parantheses around exp cycles calcMerge branch 'feature/expected_cycles_per_layer' of https://github.com/Xilinx/finn into feature/expected_cycles_per_layer[HLSCustomOp] fix exp cycles for AccPool, band-aid failing test[Test] fix FIFO tests[Analysis] update comment in exp_cycles_per_layerMerge branch 'dev' into feature/expected_cycles_per_layerMerge pull request #199 from quetric/feature_custom_zynq_shell[Driver] fix wait condition for zynq-iodma[Test] don't use debug mode for ZynqBuild end2end testsMerge pull request #208 from HenniOVP/feature/issue_205[Util] Python style compliance[Transform] minor assertion fixes in InsertFIFO and InsertIODMA[Test] add more ZynqBuild tests for tfc-w2a2 and cnv-w1a1Cleaned up core xml, set all support levels to ProductionFixed address range of readmemh in rtl streamer[ZYNQ] remove InsertTLastMarker, support stitching w/o TLastMarker[Core] support renamed tensors for SDP output[Driver] make i/o folded shape dependent on platform[DMA] fix IODMA num outputs[Test] add own test for zynqbuild for now