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Created with Raphaël 2.2.05Apr4324Mar231615141310976432128Feb272423222120161514131098732131Jan3029272624222018171613121110965430Dec291913128652125Nov171613108732131Oct2726242119171614131211107654329Sep28272623222019161514987631Aug3029262524221918151211109843129Jul282726252221201918151413121198[Transform] Update check for dt in infer quant avg pool[QONNX conversion] Update infer quant avg pool 2d[Deps] Update qonnx commit version[jenkins] the './' was necessary to run the test, not moving into a new directoryRevert "[jenkins] move into the test dir before running quicktest"[jenkins] keep 30 builds in build history[jenkins] move into the test dir before running quicktest[jenkins] introduce basic declaritive pipeline[jenkins] add node label to JenkinsfileAdd support for RFSoC 4x2 boardMerge branch 'dev' into feature/swgg_parallel_v2[SWG] Incorporate minor comments on Verilog codeMerge pull request #786 from Xilinx/fix/minimize_bw[Builder] infer data types after bit width minimization[CustomOp] pre-commit on rtl swg[SWG] Move common modules to static source fileMerge pull request #784 from Xilinx/fix/test_cybsec[Tests] Update resource estimates in cybsec testMerge pull request #783 from Xilinx/fix/test_vvau[Tests] Remove minimize acc width for vvau testsMerge pull request #776 from i-colbert/features/accumulatorsMerge remote-tracking branch 'upstream/dev' into features/accumulatorsMerge pull request #782 from Xilinx/fix/data_packing[Util] Fix interpretation of dtype to check for signed integerCleaning up weight data types for pytest options[Tests] Move minimize bit width test and add Jenkins markerMerge pull request #779 from rstar900/patch-1[Docs] Update API links in internals section[Docs] Update internals.rst[Docs] Modify docstring in set folding transformFixed Summary TypoMerge remote-tracking branch 'upstream/dev' into feature/swgg_parallel_v2Merge pull request #778 from Xilinx/fix/driver_rt_weights[Driver] Update loading of rt weights in driver baseMerge pull request #723 from fpjentzsch/feature/vvau_simd[Tests] Delete vivado_hls bug test from thresholding testingMerge remote-tracking branch 'upstream/dev' into feature/vvau_simd[Thres] remove workaround for vivado_hls bug for T[0][0]=0 caseMerge pull request #777 from Xilinx/feature/relu_act_export_test[Tests] Update brevitas export test for relu