Skip to content
Snippets Groups Projects
Select Git revision
  • accl default
  • adegendt/accl_clone
  • dev
  • full_accl_support
  • georg/accl-build
  • georg/accl-complete
  • georg/accl-finn
  • georg/end2end
  • main protected
9 results
You can move around the graph by using the arrow keys.
Created with Raphaël 2.2.010Aug9843129Jul282726252221201918151413121198765430Jun292827242322212017151312109872131May30252423201817161312111098654328Apr2120730Mar2825242322151411842124Feb222019181716151110983131Jan2725211322Dec211716151362130Nov2927262423201615131211108543229Oct2827222120191815141312111087641[Test] add copyright header to eltwise[Deps] update finn-hlslib[Test] flesh out FIFO characterizatio test for MVAU[FIFO] bugfix: add reset, extra checks[HLSCustomOp] add missing attribute for characterization period[LookUp layer] Fix typo in pragma insertion[Prepare_IP] Fix on a bug where two IPs could have the same name and not correspond to the same object.[LookUp layer] Change hls implementation of LU external[Deps] update QONNX to latest versionMerge pull request #654 from hleblevec/feature/vitisbuild[Floorplan] Hot fix to correct issues in VitisBuild when using multiple axilite interfaces.[Floorplan] Hot fix to correct issues in VitisBuild when using multiple axilite interfaces.[Floorplan] temporary commit[Floorplan] temporary commitLookup through external memory with input bounds checking.Merge branch 'dev' into feature/streaming_eltwiseMerge pull request #647 from Xilinx/feature/builder_verboseMerge branch 'dev' into feature/builder_verboseMerge pull request #646 from Xilinx/fix/qonnx_quant_conv_bias[Test] add test_fclayer_fifocharacterize[FIFO] bugfix in DeriveCharacteristic[FIFO] Introduce new DeriveCharacteristic transform[HLSCustomOp] add new attrs for FIFO sizing[floorplan] Now attributes different partition ids to nodes that need an axilite interfaceMerge pull request #651 from fionnodonohoe-xlnx/dev[actions] Update precommit version to work with Act[Test] add missing test markings to Downsample[Test] broaden scope of Downsampler tests[Tests] Remove saving of .onnx files in testsMerge branch 'dev' into fix/qonnx_quant_conv_biasMerge pull request #645 from Xilinx/feature/streamline_improvements[Downsample] add 1D downsample support + conversion[Test] new test for Downsampler[Downsample] reflect changes to HLS kernel name changeMerge branch 'dev' into feature/streamline_improvements[Deps] update hlslibMerge pull request #642 from Xilinx/feature/workflow_fix[tests] temporarily exclude mobilenet qonnx test[actions] Remove all other commands from quicktest workflow but shell script[VVAU] bugfix in weight reps for node-by-node rtlsim
Loading