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Created with Raphaël 2.2.013Oct1211107654329Sep28272623222019161514987631Aug3029262524221918151211109843129Jul282726252221201918151413121198765430Jun292827242322212017151312109872131May30252423201817161312111098654328Apr2120730Mar2825242322151411842124Feb222019181716151110983131Jan2725211322Dec211716151362130Nov29272624232016[Test] expand testcase to cover FMPadding_rtl[Pad] add FMPadding_rtl to op registry, fixes to its CustomOp[Pad] update fmpadding_rtl templateMerge branch 'feature/fmpadding_dynamic' into feature/fmpadding_dynamic_integrationAdded capability to custom-initialize dynamic parameter registers upon design configuration.[FMPadding] conversion, inst template, CustomOp for FMPadding_rtlAdded AXI-Light adapter to dynamically-sized feature map padding.First prototype for dynamically sized FM padding.Added AXI-Light adapter to dynamically-sized feature map padding.Merge pull request #698 from Xilinx/feature/fmpadding[Test] Removing two configurations from fmpadding testFirst prototype for dynamically sized FM padding.Merge pull request #697 from Xilinx/hotfix/eltwise-fifos[EltWise] Change order for node attribute update[EltWise] Add node attribute for inFIFODepthsMerge pull request #695 from Xilinx/hotfix/qsrl_reset_ibpMerge pull request #696 from Xilinx/hotfix/swgg-topMerge branch 'dev' into hotfix/qsrl_reset_ibpMerge pull request #689 from Xilinx/feature/new-fifo-sizing[Refactor] Minor fixes on code[CustomOp] Update fmpadding to new hls code[Jenkins] Add marker to fifosizing test[Test] introduce test_fpgadataflow_conv_dynamic[Streamline] bugfix in AbsorbConsecutiveTransposes[CustomOp] Remove overwriting of default FIFO sizes[CustomOps] Add missing indices in shape/datatype fctsMerge dev into feature/new-fifo-sizingMerge pull request #685 from Xilinx/feature/rtlsim-vivado-ip[Util] Add comment about usage of axis infrastructure vh[Stitch] explicitly mark finn_design as top levelFIFO] bugfix post-reset ibp condition on Q_srlMerge branch 'dev' into feature/rtlsim-vivado-ipMerge pull request #680 from Xilinx/feature/builder_verification_improvementsMerge branch 'dev' into feature/builder_verification_improvements[SWGG] inherit interface dict from HLSCustomOp to remain compatibleMerge branch 'feature/swgg_dynamic' of https://github.com/fpjentzsch/finn into fpjentzsch-feature/swgg_dynamic[FIFO] don't round-up sizes to 2^x, StreamingFIFO does it dynamicallyMerge pull request #653 from Xilinx/feature/lookup_bounds[FIFO] small bugfix in input txn countingMerge pull request #650 from Xilinx/feature/1d-downsample