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Created with Raphaël 2.2.022Feb2019181716151110983131Jan2725211322Dec211716151362130Nov2927262423201615131211108543229Oct282722212019181514131211108764130Sep292827242322212019171613121098731Aug30272320191716131210965426Jul23151312653230Jun282524232117151410987543130May28262520181716141110987653130Apr2927232221201918151412109826Mar25242317543226Feb2423221812111087641[StreamingMaxPool] add comments on 1d-specific attributesMerge branch 'feature/maxpool_ceil' of https://github.com/mmrahorovic/finn into feature/maxpool_1d_pe_ceilMerge branch 'feature/pe_maxpool' of https://github.com/mmrahorovic/finn into feature/maxpool_1d_pe_ceil[Deps] update finn-base and hlslib[custom_op]: remainder_size is moved to hls custom-opMerge branch 'dev' into feature/vitis_hls_2021.2Merge pull request #552 from mmrahorovic/fix_pre_commit[custom_op]: work-around for passing remainder size to HLS op[transform]: change attribute handling MaxPool[tests]: added test case for MaxPool with ceil mode[transform]: InferStreamingMaxPool support for ceil mode[custom_op]: MaxPool support for ceil mode[tests]: unit test case for MakeMaxPoolNHWC[transform]: support for ceil mode MaxPoolMerge remote-tracking branch 'origin/feature/pe_maxpool' into feature/maxpool_ceil[custom_op]: corrected maxpool in/out stream width and shapes[convert_hls]: modifications to enable 1D MaxPool layers with PE / non-divisible pool/image dimensions[custom_op]: PE-parallelism support for 1D MaxPool layers[tests]: updated MaxPool test, changed FPGA part[pre-commit]: minor changes to coding style[requirements]: update pre-commit[pre-commit]: update to repo[docker]: reverted previous temporary change[Builder] allow passing rtlsim hook to verificationupdated test case[Lookup] reverse output layout + associated fixestemp changesupdate README[custom_op]: support for optimized 1D dws SWU[Build] don't cast validation i/o data to float32 while loading[QONNX] support Quant -> Gather for quantized embeddingsBasic MMV in/out implementation for a special 1D case[ConvertToHLS] make 1D SWG kernel check more constrainedMerge pull request #506 from mmrahorovic/feature/vitis-swu-1d[HLSCustomOp] update exp cycles for stride>1 1D DWS SWG[Test] bring back stride for 1D SWG testcase[Deps] update finn-hlslib[ConvertToHLS] re-enable 1D SWG DW conv with stride[HLSCustomOp] bring back old impl for 1D DWS SWGBasic custom_op integration, fixed AXIS handshake