Commits · 3a2ec17c6ea4db90723b466fb225112a4bf70657 · streichg / Finn · GitLab

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Jun 15, 2020
- [FPGADataFlow] Clean code · 5de37a43
  Tobi-Alonso authored 4 years ago
  
  5de37a43
- [FPGADataFlow] Create parallel version of PrepareCppSim · 57f42b20
  Tobi-Alonso authored 4 years ago
  
  57f42b20
Jun 14, 2020
- [Util] preliminary remote Vivado support for out-of-context synth · b92ecdb7
  Yaman Umuroglu authored 4 years ago
  
  b92ecdb7
Jun 12, 2020
- [Transform] introduce SynthOutOfContext · 60dc9934
  Yaman Umuroglu authored 4 years ago
  
  60dc9934
- [Util] introduce out_of_context_synth · efeb06e3
  Yaman Umuroglu authored 4 years ago
  
  efeb06e3
Jun 11, 2020
- [Util] introduce hls_mlp_maker and hls_random_mlp_maker + test · 9b1488cc
  Yaman Umuroglu authored 4 years ago
  
  9b1488cc
Jun 10, 2020
- [Util] add vcd utils for FIFO count signals · 2dd901f8
  Yaman Umuroglu authored 4 years ago
  
  2dd901f8
- [Util] extra comment re. fifo cnt trace depth · 4c2d8756
  Yaman Umuroglu authored 4 years ago
  
  4c2d8756
- [FIFO] expose FIFO count port · 686a2505
  Yaman Umuroglu authored 4 years ago
  
  686a2505
- [Util] approx clock edges for if stats · cd8a6c43
  Yaman Umuroglu authored 4 years ago
  
  cd8a6c43
- [rtlsim] no autoeval for IP-stitched rtlsim · 0899ce44
  Yaman Umuroglu authored 4 years ago
  
  0899ce44
- [Core] bugfix in execute_node · 2d5b1ed6
  Yaman Umuroglu authored 4 years ago
  
  2d5b1ed6
Jun 09, 2020
- [Util] parallelize get_all_stream_if_stats · 64a3a0ff
  Yaman Umuroglu authored 4 years ago
  
  64a3a0ff
- [Util] introduce get_all_stream_if_stats · 66a7d8b0
  Yaman Umuroglu authored 4 years ago
  
  66a7d8b0
- [Util] add comment about trace depths · 28118f5f
  Yaman Umuroglu authored 4 years ago
  
  28118f5f
- [Util] bugfix in list_stream_if, use vars for stream signal names · d21eb0b4
  Yaman Umuroglu authored 4 years ago
  
  d21eb0b4
Jun 08, 2020
- [Util] add vcd.py with some stream performance analysis util fxns · c7eb0487
  Yaman Umuroglu authored 4 years ago
  
  c7eb0487
- [CustomOp] add some comments to Im2Col and its HLS variant · 9aa2a648
  Yaman Umuroglu authored 4 years ago
  
  9aa2a648
Jun 05, 2020
- [HLSCustomOp] remove OutputDim as FMPadding attribute, can compute · a02215fc
  Yaman Umuroglu authored 4 years ago
  
  a02215fc
- [FPGADataFlow] InferConvInpGen inserts padding node when required · 68c957bf
  Tobi-Alonso authored 4 years ago
  
  68c957bf
- [HSLCustomOp] Change FMPadding_Batch Padding attribute default form 4 to 2 as is more common · 054d4dd6
  Tobi-Alonso authored 4 years ago
  
  054d4dd6
- [HLSCustomOp] Remove redundant SameResize_Batch HLSCustomOp as FMPadding_Batch is preferred over it · 41e89ca0
  Tobi-Alonso authored 4 years ago
  
  41e89ca0
Jun 03, 2020
- [HLSCustomOp] Add HLSCustomOp for FMPadding_Batch HLS function call to perform padding · 79e8a59c
  Tobi-Alonso authored 4 years ago
  
  79e8a59c
- [HLSCustomOp] Add support for sliding window generator with kernel_size % stride != 0 · 6993d980
  Tobi-Alonso authored 4 years ago
  
  6993d980
Jun 02, 2020
- [HLSCustomOp] Add depthwise option to ConvInputGen custom op · 54365d28
  auphelia authored 4 years ago
  
  54365d28
May 28, 2020
- [HLSCustomOp] bring back directives option in base · 56bdc622
  Yaman Umuroglu authored 4 years ago
  
  56bdc622
- [HLSCustomOp] bring back directives option in hls_syn.tcl · 0b784458
  Yaman Umuroglu authored 4 years ago
  
  0b784458
- [StreamingFC] Update saving of weights for lates finn-hlslib streaming mvau · 50d04049
  auphelia authored 4 years ago
  
  50d04049
- [Transform] update comments for SortGraph · e5cfd570
  Yaman Umuroglu authored 4 years ago
  
  e5cfd570
- [HLSCustomOp] Update ConvInputGen with default resource type · 5f6b0d9f
  auphelia authored 4 years ago
  
  5f6b0d9f
- [CustomOp] Changing setting of resource type for ConvInputGen · c6b8c7d3
  auphelia authored 4 years ago
  
  c6b8c7d3
May 27, 2020
- [Core] introduce throughput_test_rtlsim · 7b4bebd7
  Yaman Umuroglu authored 4 years ago
  
  7b4bebd7
- [rtlsim] allow using larger batch inputs · aead9786
  Yaman Umuroglu authored 4 years ago
  
  this is in preparation for the rtlsim throughput test
  aead9786
- [Core - Modelwrapper] Change name of variable in sparsity utility fct · 779ebda8
  auphelia authored 4 years ago
  
  779ebda8
- [Core & Test] Add modelwrapper functions to get and set sparsity annotation · 68ca45b1
  auphelia authored 4 years ago
  
  68ca45b1
May 26, 2020
- [Util] add pynq_native_port_width · ad9e3f76
  Yaman Umuroglu authored 4 years ago
  
  ad9e3f76
- [Core, PYNQ] remove stale files to detect errors better · f929ccd6
  Yaman Umuroglu authored 4 years ago
  
  f929ccd6
- [PYNQ] remove stale outputs in generated driver · aaa5dead
  Yaman Umuroglu authored 4 years ago
  
  aaa5dead
May 25, 2020
- [PYNQ] set desired fclk when loading driver · e6881d8f
  Yaman Umuroglu authored 4 years ago
  
  e6881d8f
- [PYNQ] add N and fclk_mhz to generated driver stats · a0cc7e68
  Yaman Umuroglu authored 4 years ago
  
  a0cc7e68