Merge pull request #753 from fpjentzsch/hotfix/vitis_build_rtl

Hotfix: top module setting in CreateStitchedIP

src/finn/transformation/fpgadataflow/create_stitched_ip.py

@@ -412,7 +412,7 @@ class CreateStitchedIP(Transformation):
         wrapper_filename = "%s/hdl/%s_wrapper.v" % (bd_base, block_name)
         tcl.append("add_files -norecurse %s" % wrapper_filename)
         model.set_metadata_prop("wrapper_filename", wrapper_filename)
-        tcl.append("set_property top finn_design_wrapper [current_fileset]")
+        tcl.append("set_property top %s_wrapper [current_fileset]" % block_name)
         # synthesize to DCP and export stub, DCP and constraints
         if self.vitis:
             tcl.append(