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Unverified Commit ad063dc5 authored by Yaman Umuroglu's avatar Yaman Umuroglu Committed by GitHub
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Update example_networks.rst

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......@@ -15,22 +15,22 @@ The rows in the table are different steps of the FINN end-to-end flow.
If a particular network is supported for a particular step in the current FINN
version, this is indicated by an x mark in the table.
+-----------------------+------------+----------+----------+----------+----------+----------+
| FINN step | Basic test | TFC-w1a1 | TFC-w1a2 | CNV-w1a1 | CNV-w1a2 | CNV-w2a2 |
+-----------------------+------------+----------+----------+----------+----------+----------+
| Export/Import | x | x | x | x | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
| Streamlining | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
| Convert to HLS layers | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
| Stitched IP | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
| Hardware test | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
| npysim | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
| rtlsim node-by-node | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
| rtlsim stitched IP | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| FINN step | Basic test | TFC-w1a1 | TFC-w1a2 | TFC-w2a2 | CNV-w1a1 | CNV-w1a2 | CNV-w2a2 |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| Export/Import | x | x | x | x | x | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| Streamlining | x | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| Convert to HLS layers | x | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| Stitched IP | x | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| Hardware test | x | x | x | | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| npysim | x | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| rtlsim node-by-node | x | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
| rtlsim stitched IP | x | x | x | x | | | |
+-----------------------+------------+----------+----------+----------+----------+----------+----------+
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