[SWG] Incorporate minor comments on Verilog code (24bd1907) · Commits · streichg / Finn · GitLab

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24bd1907

Commit 24bd1907 authored 1 year ago by Felix Jentzsch

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[SWG] Incorporate minor comments on Verilog code

parent f94e1cbd

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finn-rtllib/swg/swg_common.sv 28 additions, 27 deletions

finn-rtllib/swg/swg_common.sv
finn-rtllib/swg/swg_template_parallel.sv 4 additions, 4 deletions

finn-rtllib/swg/swg_template_parallel.sv
src/finn/custom_op/fpgadataflow/convolutioninputgenerator_rtl.py 3 additions, 3 deletions

...n/custom_op/fpgadataflow/convolutioninputgenerator_rtl.py

with 35 additions and 34 deletions

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