* treewide: Add Saxon SoC USB 1.1 (OHCI) controller

* treewide: Clean up USB implementation

* sw: Update `cva6-sdk`

* target/xilinx: Reenable UNBENT

* ci: Exclude Spinal OHCI source from linting

* treewide: Update license information

* sw: Differentiate device trees

* hw: Change SpinalHDL USB configuration

- Reduces the internal buffer size from 2kB to 1088 byte
  minimum is 1023 + DMA_width/8 byte, the max size of a packet
   with overhead for alignment
- BufferCC clock domain crossings for proper constraints

* hw: Remove timescale in USB controller

* sw: Add different device trees (images) for Genesys 2 Linux configs

* docs: Add USB changes to documentation

* target/xilinx: Constrain USB I/O paths

* sw/boot: Revise device trees

---------

Co-authored-by: Luka Guzenko <74648283+TheSmolBoy@users.noreply.github.com>
Co-authored-by: Paul Scheffler <paulsc@iis.ee.ethz.ch>
Co-authored-by: Philippe Sauter <phsauter@student.ethz.ch>