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pps_ws/build/ dfall_ws/build/
pps_ws/devel/ dfall_ws/devel/
dfall_ws/src/dfall_pkg/lib/vicon/
dfall_ws/src/dfall_pkg/include/DataStreamClient.h
dfall_ws/src/dfall_pkg/include/IDataStreamClientBase.h
dfall_ws/src/CMakeLists.txt
# Qt Project files with user preferences
*.pro.user
*.pro.user.*
*.pyc *.pyc
*.orig
*.bag
TAGS
build-*
# For LaTeX files in the wiki
wiki/latex/*
!wiki/latex/*.tex
pps_ws/src/d_fall_pps/GUI_Qt/build* # NOTES:
# > To keep track of configuration-type files that
# are part of the repository, BUT for whcih
# changes are NOT tracked.
# > These files are "skipped" from tracking using
# the following syntax:
# >> git update-index --skip-worktree <FILENAME>
# > The files that should be "skipped" are:
# >> dfall_ws/src/dfall_pkg/launch/Config.sh
# >> dfall_ws/src/dfall_pkg/param/Crazyflie.db
# > To return these files to normal tracking use
# the following syntax:
# >> git update-index --no-skip-worktree <FILENAME>
# > "Skipping" is a setting local to your copy of the
# repository because ".git ignoring" a file already
# in the repository does NOT stop changes from being
# tracked
This diff is collapsed.
/*
FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <stdint.h>
#include "config.h"
#include "cfassert.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) FREERTOS_MCU_CLOCK_HZ )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) FREERTOS_MIN_STACK_SIZE )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( FREERTOS_HEAP_SIZE ) )
#define configMAX_TASK_NAME_LEN ( 10 )
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 0
#define configUSE_CO_ROUTINES 0
#ifdef DEBUG
#define configCHECK_FOR_STACK_OVERFLOW 1
#else
#define configCHECK_FOR_STACK_OVERFLOW 0
#endif
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY 1
#define configTIMER_QUEUE_LENGTH 20
#define configUSE_MALLOC_FAILED_HOOK 1
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
#define configMAX_PRIORITIES ( 6 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 1
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define configUSE_MUTEXES 1
#define configKERNEL_INTERRUPT_PRIORITY 255
//#define configMAX_SYSCALL_INTERRUPT_PRIORITY 1
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 0x5F /* equivalent to 0x05, or priority 5. */
//Map the port handler to the crt0 interruptions handlers
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler tickFreeRTOS
#define vPortSVCHandler SVC_Handler
//Milliseconds to OS Ticks
#define M2T(X) ((unsigned int)((X)*(configTICK_RATE_HZ/1000.0)))
#define F2T(X) ((unsigned int)((configTICK_RATE_HZ/(X))))
// DEBUG SECTION
#define configUSE_APPLICATION_TASK_TAG 1
#define configQUEUE_REGISTRY_SIZE 10
#define TASK_LED_ID_NBR 1
#define TASK_RADIO_ID_NBR 2
#define TASK_STABILIZER_ID_NBR 3
#define TASK_ADC_ID_NBR 4
#define TASK_PM_ID_NBR 5
#define TASK_PROXIMITY_ID_NBR 6
#define configASSERT( x ) if( ( x ) == 0 ) assertFail(#x, __FILE__, __LINE__ )
/*
#define traceTASK_SWITCHED_IN() \
{ \
extern void debugSendTraceInfo(unsigned int taskNbr); \
debugSendTraceInfo((int)pxCurrentTCB->pxTaskTag); \
}
*/
// Queue monitoring
#ifdef DEBUG_QUEUE_MONITOR
#undef traceQUEUE_SEND
#undef traceQUEUE_SEND_FAILED
#define traceQUEUE_SEND(xQueue) qm_traceQUEUE_SEND(xQueue)
void qm_traceQUEUE_SEND(void* xQueue);
#define traceQUEUE_SEND_FAILED(xQueue) qm_traceQUEUE_SEND_FAILED(xQueue)
void qm_traceQUEUE_SEND_FAILED(void* xQueue);
#endif // DEBUG_QUEUE_MONITOR
#endif /* FREERTOS_CONFIG_H */
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2011-2012 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* config.h - Main configuration file
*
* This file define the default configuration of the copter
* It contains two types of parameters:
* - The global parameters are globally defined and independent of any
* compilation profile. An example of such define could be some pinout.
* - The profiled defines, they are parameter that can be specific to each
* dev build. The vanilla build is intended to be a "customer" build without
* fancy spinning debugging stuff. The developers build are anything the
* developer could need to debug and run his code/crazy stuff.
*
* The golden rule for the profile is NEVER BREAK ANOTHER PROFILE. When adding a
* new parameter, one shall take care to modified everything necessary to
* preserve the behavior of the other profiles.
*
* For the flag. T_ means task. H_ means HAL module. U_ would means utils.
*/
#ifndef CONFIG_H_
#define CONFIG_H_
#include "nrf24l01.h"
#include "trace.h"
#define PROTOCOL_VERSION 2
#ifdef STM32F4XX
#define P_NAME "Crazyflie 2.0"
#define QUAD_FORMATION_X
#define CONFIG_BLOCK_ADDRESS (2048 * (64-1))
#define MCU_ID_ADDRESS 0x1FFF7A10
#define MCU_FLASH_SIZE_ADDRESS 0x1FFF7A22
#define FREERTOS_HEAP_SIZE 30000
#define FREERTOS_MIN_STACK_SIZE 150 // M4-FPU register setup is bigger so stack needs to be bigger
#define FREERTOS_MCU_CLOCK_HZ 168000000
#else
#define P_NAME "Crazyflie 1.0"
#define CONFIG_BLOCK_ADDRESS (1024 * (128-1))
#define MCU_ID_ADDRESS 0x1FFFF7E8
#define MCU_FLASH_SIZE_ADDRESS 0x1FFFF7E0
#define FREERTOS_HEAP_SIZE 14000
#define FREERTOS_MIN_STACK_SIZE 100
#define FREERTOS_MCU_CLOCK_HZ 72000000
#endif
// Task priorities. Higher number higher priority
#define STABILIZER_TASK_PRI 4
#define SENSORS_TASK_PRI 4
#define ADC_TASK_PRI 3
#define SYSTEM_TASK_PRI 2
#define CRTP_TX_TASK_PRI 2
#define CRTP_RX_TASK_PRI 2
#define EXTRX_TASK_PRI 2
#define LOG_TASK_PRI 1
#define MEM_TASK_PRI 1
#define PARAM_TASK_PRI 1
#define PROXIMITY_TASK_PRI 0
#define PM_TASK_PRI 0
#ifdef PLATFORM_CF2
#define SYSLINK_TASK_PRI 5
#define USBLINK_TASK_PRI 3
#endif
#ifdef PLATFORM_CF1
#define NRF24LINK_TASK_PRI 2
#define ESKYLINK_TASK_PRI 1
#define UART_RX_TASK_PRI 2
#endif
// Not compiled
#if 0
#define INFO_TASK_PRI 2
#define PID_CTRL_TASK_PRI 2
#endif
// Task names
#define SYSTEM_TASK_NAME "SYSTEM"
#define ADC_TASK_NAME "ADC"
#define PM_TASK_NAME "PWRMGNT"
#define CRTP_TX_TASK_NAME "CRTP-TX"
#define CRTP_RX_TASK_NAME "CRTP-RX"
#define CRTP_RXTX_TASK_NAME "CRTP-RXTX"
#define LOG_TASK_NAME "LOG"
#define MEM_TASK_NAME "MEM"
#define PARAM_TASK_NAME "PARAM"
#define SENSORS_TASK_NAME "SENSORS"
#define STABILIZER_TASK_NAME "STABILIZER"
#define NRF24LINK_TASK_NAME "NRF24LINK"
#define ESKYLINK_TASK_NAME "ESKYLINK"
#define SYSLINK_TASK_NAME "SYSLINK"
#define USBLINK_TASK_NAME "USBLINK"
#define PROXIMITY_TASK_NAME "PROXIMITY"
#define EXTRX_TASK_NAME "EXTRX"
#define UART_RX_TASK_NAME "UART"
//Task stack sizes
#define SYSTEM_TASK_STACKSIZE (2* configMINIMAL_STACK_SIZE)
#define ADC_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define PM_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define CRTP_TX_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define CRTP_RX_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define CRTP_RXTX_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define LOG_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define MEM_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define PARAM_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define SENSORS_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define STABILIZER_TASK_STACKSIZE (3 * configMINIMAL_STACK_SIZE)
#define NRF24LINK_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define ESKYLINK_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define SYSLINK_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define USBLINK_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define PROXIMITY_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define EXTRX_TASK_STACKSIZE configMINIMAL_STACK_SIZE
#define UART_RX_TASK_STACKSIZE configMINIMAL_STACK_SIZE
//The radio channel. From 0 to 125
#define RADIO_CHANNEL 80
#define RADIO_DATARATE RADIO_RATE_250K
#define RADIO_ADDRESS 0xE7E7E7E7E7ULL
/**
* \def ACTIVATE_AUTO_SHUTDOWN
* Will automatically shot of system if no radio activity
*/
//#define ACTIVATE_AUTO_SHUTDOWN
/**
* \def ACTIVATE_STARTUP_SOUND
* Playes a startup melody using the motors and PWM modulation
*/
#define ACTIVATE_STARTUP_SOUND
// Define to force initialization of expansion board drivers. For test-rig and programming.
//#define FORCE_EXP_DETECT
/**
* \def PRINT_OS_DEBUG_INFO
* Print with an interval information about freertos mem/stack usage to console.
*/
//#define PRINT_OS_DEBUG_INFO
//Debug defines
//#define BRUSHLESS_MOTORCONTROLLER
//#define ADC_OUTPUT_RAW_DATA
//#define UART_OUTPUT_TRACE_DATA
//#define UART_OUTPUT_RAW_DATA_ONLY
//#define IMU_OUTPUT_RAW_DATA_ON_UART
//#define T_LAUCH_MOTORS
//#define T_LAUCH_MOTOR_TEST
//#define MOTOR_RAMPUP_TEST
/**
* \def ADC_OUTPUT_RAW_DATA
* When defined the gyro data will be written to the UART channel.
* The UART must be configured to run really fast, e.g. in 2Mb/s.
*/
//#define ADC_OUTPUT_RAW_DATA
#if defined(UART_OUTPUT_TRACE_DATA) && defined(ADC_OUTPUT_RAW_DATA)
# error "Can't define UART_OUTPUT_TRACE_DATA and ADC_OUTPUT_RAW_DATA at the same time"
#endif
#if defined(UART_OUTPUT_TRACE_DATA) || defined(ADC_OUTPUT_RAW_DATA) || defined(IMU_OUTPUT_RAW_DATA_ON_UART)
#define UART_OUTPUT_RAW_DATA_ONLY
#endif
#if defined(UART_OUTPUT_TRACE_DATA) && defined(T_LAUNCH_ACC)
# error "UART_OUTPUT_TRACE_DATA and T_LAUNCH_ACC doesn't work at the same time yet due to dma sharing..."
#endif
#endif /* CONFIG_H_ */
/*---------------------------------------------------------------------------/
/ FatFs - FAT file system module configuration file
/---------------------------------------------------------------------------*/
#define _FFCONF 68020 /* Revision ID */
/*---------------------------------------------------------------------------/
/ Function Configurations
/---------------------------------------------------------------------------*/
#define _FS_READONLY 0
/* This option switches read-only configuration. (0:Read/Write or 1:Read-only)
/ Read-only configuration removes writing API functions, f_write(), f_sync(),
/ f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()
/ and optional writing functions as well. */
#define _FS_MINIMIZE 0
/* This option defines minimization level to remove some basic API functions.
/
/ 0: All basic functions are enabled.
/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename()
/ are removed.
/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
/ 3: f_lseek() function is removed in addition to 2. */
#define _USE_STRFUNC 2
/* This option switches string functions, f_gets(), f_putc(), f_puts() and
/ f_printf().
/
/ 0: Disable string functions.
/ 1: Enable without LF-CRLF conversion.
/ 2: Enable with LF-CRLF conversion. */
#define _USE_FIND 1
/* This option switches filtered directory read feature and related functions,
/ f_findfirst() and f_findnext(). (0:Disable or 1:Enable) */
#define _USE_MKFS 1
/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
#define _USE_FASTSEEK 0
/* This option switches fast seek function. (0:Disable or 1:Enable) */
#define _USE_EXPAND 0
/* This option switches f_expand function. (0:Disable or 1:Enable) */
#define _USE_CHMOD 0
/* This option switches attribute manipulation functions, f_chmod() and f_utime().
/ (0:Disable or 1:Enable) Also _FS_READONLY needs to be 0 to enable this option. */
#define _USE_LABEL 1
/* This option switches volume label functions, f_getlabel() and f_setlabel().
/ (0:Disable or 1:Enable) */
#define _USE_FORWARD 1
/* This option switches f_forward() function. (0:Disable or 1:Enable) */
/*---------------------------------------------------------------------------/
/ Locale and Namespace Configurations
/---------------------------------------------------------------------------*/
#define _CODE_PAGE 850
/* This option specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure.
/
/ 1 - ASCII (No extended character. Non-LFN cfg. only)
/ 437 - U.S.
/ 720 - Arabic
/ 737 - Greek
/ 771 - KBL
/ 775 - Baltic
/ 850 - Latin 1
/ 852 - Latin 2
/ 855 - Cyrillic
/ 857 - Turkish
/ 860 - Portuguese
/ 861 - Icelandic
/ 862 - Hebrew
/ 863 - Canadian French
/ 864 - Arabic
/ 865 - Nordic
/ 866 - Russian
/ 869 - Greek 2
/ 932 - Japanese (DBCS)
/ 936 - Simplified Chinese (DBCS)
/ 949 - Korean (DBCS)
/ 950 - Traditional Chinese (DBCS)
*/
#define _USE_LFN 3
#define _MAX_LFN 255
/* The _USE_LFN switches the support of long file name (LFN).
/
/ 0: Disable support of LFN. _MAX_LFN has no effect.
/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
/ 2: Enable LFN with dynamic working buffer on the STACK.
/ 3: Enable LFN with dynamic working buffer on the HEAP.
/
/ To enable the LFN, Unicode handling functions (option/unicode.c) must be added
/ to the project. The working buffer occupies (_MAX_LFN + 1) * 2 bytes and
/ additional 608 bytes at exFAT enabled. _MAX_LFN can be in range from 12 to 255.
/ It should be set 255 to support full featured LFN operations.
/ When use stack for the working buffer, take care on stack overflow. When use heap
/ memory for the working buffer, memory management functions, ff_memalloc() and
/ ff_memfree(), must be added to the project. */
#define _LFN_UNICODE 0
/* This option switches character encoding on the API. (0:ANSI/OEM or 1:UTF-16)
/ To use Unicode string for the path name, enable LFN and set _LFN_UNICODE = 1.
/ This option also affects behavior of string I/O functions. */
#define _STRF_ENCODE 3
/* When _LFN_UNICODE == 1, this option selects the character encoding ON THE FILE to
/ be read/written via string I/O functions, f_gets(), f_putc(), f_puts and f_printf().
/
/ 0: ANSI/OEM
/ 1: UTF-16LE
/ 2: UTF-16BE
/ 3: UTF-8
/
/ This option has no effect when _LFN_UNICODE == 0. */
#define _FS_RPATH 2
/* This option configures support of relative path.
/
/ 0: Disable relative path and remove related functions.
/ 1: Enable relative path. f_chdir() and f_chdrive() are available.
/ 2: f_getcwd() function is available in addition to 1.
*/
/*---------------------------------------------------------------------------/
/ Drive/Volume Configurations
/---------------------------------------------------------------------------*/
#define _VOLUMES 1
/* Number of volumes (logical drives) to be used. */
#define _STR_VOLUME_ID 1
#define _VOLUME_STRS "SD"
/* _STR_VOLUME_ID switches string support of volume ID.
/ When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive
/ number in the path name. _VOLUME_STRS defines the drive ID strings for each
/ logical drives. Number of items must be equal to _VOLUMES. Valid characters for
/ the drive ID strings are: A-Z and 0-9. */
#define _MULTI_PARTITION 0
/* This option switches support of multi-partition on a physical drive.
/ By default (0), each logical drive number is bound to the same physical drive
/ number and only an FAT volume found on the physical drive will be mounted.
/ When multi-partition is enabled (1), each logical drive number can be bound to
/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
/ funciton will be available. */
#define _MIN_SS 512
#define _MAX_SS 512
/* These options configure the range of sector size to be supported. (512, 1024,
/ 2048 or 4096) Always set both 512 for most systems, all type of memory cards and
/ harddisk. But a larger value may be required for on-board flash memory and some
/ type of optical media. When _MAX_SS is larger than _MIN_SS, FatFs is configured
/ to variable sector size and GET_SECTOR_SIZE command must be implemented to the
/ disk_ioctl() function. */
#define _USE_TRIM 0
/* This option switches support of ATA-TRIM. (0:Disable or 1:Enable)
/ To enable Trim function, also CTRL_TRIM command should be implemented to the
/ disk_ioctl() function. */
#define _FS_NOFSINFO 0
/* If you need to know correct free space on the FAT32 volume, set bit 0 of this
/ option, and f_getfree() function at first time after volume mount will force
/ a full FAT scan. Bit 1 controls the use of last allocated cluster number.
/
/ bit0=0: Use free cluster count in the FSINFO if available.
/ bit0=1: Do not trust free cluster count in the FSINFO.
/ bit1=0: Use last allocated cluster number in the FSINFO if available.
/ bit1=1: Do not trust last allocated cluster number in the FSINFO.
*/
/*---------------------------------------------------------------------------/
/ System Configurations
/---------------------------------------------------------------------------*/
#define _FS_TINY 0
/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
/ At the tiny configuration, size of file object (FIL) is reduced _MAX_SS bytes.
/ Instead of private sector buffer eliminated from the file object, common sector
/ buffer in the file system object (FATFS) is used for the file data transfer. */
#define _FS_EXFAT 0
/* This option switches support of exFAT file system. (0:Disable or 1:Enable)
/ When enable exFAT, also LFN needs to be enabled. (_USE_LFN >= 1)
/ Note that enabling exFAT discards C89 compatibility. */
#define _FS_NORTC 0
#define _NORTC_MON 2
#define _NORTC_MDAY 1
#define _NORTC_YEAR 2016
/* The option _FS_NORTC switches timestamp functiton. If the system does not have
/ any RTC function or valid timestamp is not needed, set _FS_NORTC = 1 to disable
/ the timestamp function. All objects modified by FatFs will have a fixed timestamp
/ defined by _NORTC_MON, _NORTC_MDAY and _NORTC_YEAR in local time.
/ To enable timestamp function (_FS_NORTC = 0), get_fattime() function need to be
/ added to the project to get current time form real-time clock. _NORTC_MON,
/ _NORTC_MDAY and _NORTC_YEAR have no effect.
/ These options have no effect at read-only configuration (_FS_READONLY = 1). */
#define _FS_LOCK 0
/* The option _FS_LOCK switches file lock function to control duplicated file open
/ and illegal operation to open objects. This option must be 0 when _FS_READONLY
/ is 1.
/
/ 0: Disable file lock function. To avoid volume corruption, application program
/ should avoid illegal open, remove and rename to the open objects.
/ >0: Enable file lock function. The value defines how many files/sub-directories
/ can be opened simultaneously under file lock control. Note that the file
/ lock control is independent of re-entrancy. */
#define _FS_REENTRANT 0
#define _FS_TIMEOUT 1000
#define _SYNC_t HANDLE
/* The option _FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
/ module itself. Note that regardless of this option, file access to different
/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
/ and f_fdisk() function, are always not re-entrant. Only file/directory access
/ to the same volume is under control of this function.
/
/ 0: Disable re-entrancy. _FS_TIMEOUT and _SYNC_t have no effect.
/ 1: Enable re-entrancy. Also user provided synchronization handlers,
/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
/ function, must be added to the project. Samples are available in
/ option/syscall.c.
/
/ The _FS_TIMEOUT defines timeout period in unit of time tick.
/ The _SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*,
/ SemaphoreHandle_t and etc.. A header file for O/S definitions needs to be
/ included somewhere in the scope of ff.h. */
/* #include <windows.h> // O/S definitions */
/*--- End of configuration options ---*/
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2011-2012 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* nvicconf.c - Interrupt priority configuration
*
* The STM32 has 16 priorities to choose from where 0 is the
* highest priority. They are now configured using no groups.
*
* Interrupt functions that call FreeRTOS FromISR functions
* must have a interrupt number 10 and above which is currently
* set by configMAX_SYSCALL_INTERRUPT_PRIORITY.
*/
#ifndef NVIC_CONF_H_
#define NVIC_CONF_H_
/*
Interrupt priority organisation in Crazyflie:
In Cortex-M low priority number is higher priority. Hence priority 0 is the
highest priority interrupt and priority 15 the lowest (STM32 implements
4 priority bits)
Interrupts bellow MAX_SYSCALL_INTERRUPT_PRIORITY cannot call any RTOS
functions! They should be handled like some kind of softdevice, running above
the OS.
3 Interrupt level are defined
- NVIC_LOW_PRI
- NVIC_MID_PRI
- NVIC_HIGH_PRI
The aim is to simplify interrupt handling and to document why any special case
is required.
15 -
14 -
13 - NVIC_LOW_PRI
12 - NVIC_ADC_PRI
11 - NVIC_RADIO_PRI
10 - NVIC_MID_PRI
9 -
8 -
7 - NVIC_HIGH_PRI
6 -
5 - <-- MAX_SYSCALL_INTERRUPT_PRIORITY
4 ! NVIC_I2C_PRI_LOW NVIC_TRACE_TIM_PRI --- Does not call any RTOS function
3 ! NVIC_I2C_PRI_HIGH
2 !
1 !
0 !
*/
// Standard interrupt levels
#define NVIC_LOW_PRI 13
#define NVIC_MID_PRI 10
#define NVIC_HIGH_PRI 7
// Priorities used for Crazyflie
#define NVIC_I2C_HIGH_PRI 3
#define NVIC_I2C_LOW_PRI 4
#define NVIC_TRACE_TIM_PRI 4
#define NVIC_UART_PRI 6
// Priorities for Crazyflie 2.0
#define NVIC_RADIO_PRI 11
#define NVIC_ADC_PRI 12
#define NVIC_CPPM_PRI 14
#define NVIC_SYSLINK_PRI 5
// Priorities for external interrupts
#define EXTI0_PRI NVIC_LOW_PRI
#define EXTI1_PRI NVIC_LOW_PRI
#define EXTI2_PRI NVIC_LOW_PRI
#define EXTI3_PRI NVIC_LOW_PRI
#define EXTI4_PRI NVIC_SYSLINK_PRI // this serves the syslink UART
#define EXTI9_5_PRI NVIC_LOW_PRI
#define EXTI15_10_PRI NVIC_MID_PRI // this serves the decks and sensors
#endif /* NVIC_CONF_H_ */
/**
******************************************************************************
* @file Project/Template/stm32f10x_conf.h
* @author MCD Application Team
* @version V3.1.2
* @date 09/28/2009
* @brief Library configuration file.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_CONF_H
#define __STM32F10x_CONF_H
/* Includes ------------------------------------------------------------------*/
/* Uncomment the line below to enable peripheral header file inclusion */
#include "stm32f10x_adc.h"
/* #include "stm32f10x_bkp.h" */
/* #include "stm32f10x_can.h" */
/* #include "stm32f10x_crc.h" */
/* #include "stm32f10x_dac.h" */
#include "stm32f10x_dbgmcu.h"
#include "stm32f10x_dma.h"
#include "stm32f10x_exti.h"
#include "stm32f10x_flash.h"
/* #include "stm32f10x_fsmc.h" */
#include "stm32f10x_gpio.h"
#include "stm32f10x_i2c.h"
#include "stm32f10x_iwdg.h"
/* #include "stm32f10x_pwr.h" */
#include "stm32f10x_rcc.h"
/* #include "stm32f10x_rtc.h" */
/* #include "stm32f10x_sdio.h" */
#include "stm32f10x_spi.h"
#include "stm32f10x_tim.h"
#include "stm32f10x_usart.h"
/* #include "stm32f10x_wwdg.h" */
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#endif /* __STM32F10x_CONF_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
/**
******************************************************************************
* @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_conf.h
* @author MCD Application Team
* @version V1.3.0
* @date 13-November-2013
* @brief Library configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_CONF_H
#define __STM32F4xx_CONF_H
/* Includes ------------------------------------------------------------------*/
/* Uncomment the line below to enable peripheral header file inclusion */
#include "stm32f4xx_adc.h"
#include "stm32f4xx_crc.h"
#include "stm32f4xx_dbgmcu.h"
#include "stm32f4xx_dma.h"
#include "stm32f4xx_exti.h"
#include "stm32f4xx_flash.h"
#include "stm32f4xx_gpio.h"
#include "stm32f4xx_i2c.h"
#include "stm32f4xx_iwdg.h"
#include "stm32f4xx_pwr.h"
#include "stm32f4xx_rcc.h"
#include "stm32f4xx_rtc.h"
#include "stm32f4xx_sdio.h"
#include "stm32f4xx_spi.h"
#include "stm32f4xx_syscfg.h"
#include "stm32f4xx_tim.h"
#include "stm32f4xx_usart.h"
#include "stm32f4xx_wwdg.h"
#include "stm32f4xx_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
#if defined (STM32F429_439xx)
#include "stm32f4xx_cryp.h"
#include "stm32f4xx_hash.h"
#include "stm32f4xx_rng.h"
#include "stm32f4xx_can.h"
#include "stm32f4xx_dac.h"
#include "stm32f4xx_dcmi.h"
#include "stm32f4xx_dma2d.h"
#include "stm32f4xx_fmc.h"
#include "stm32f4xx_ltdc.h"
#include "stm32f4xx_sai.h"
#endif /* STM32F429_439xx */
#if defined (STM32F427_437xx)
#include "stm32f4xx_cryp.h"
#include "stm32f4xx_hash.h"
#include "stm32f4xx_rng.h"
#include "stm32f4xx_can.h"
#include "stm32f4xx_dac.h"
#include "stm32f4xx_dcmi.h"
#include "stm32f4xx_dma2d.h"
#include "stm32f4xx_fmc.h"
#include "stm32f4xx_sai.h"
#endif /* STM32F427_437xx */
#if defined (STM32F40_41xxx)
#include "stm32f4xx_cryp.h"
#include "stm32f4xx_hash.h"
#include "stm32f4xx_rng.h"
#include "stm32f4xx_can.h"
#include "stm32f4xx_dac.h"
#include "stm32f4xx_dcmi.h"
#include "stm32f4xx_fsmc.h"
#endif /* STM32F40_41xxx */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* If an external clock source is used, then the value of the following define
should be set to the value of the external clock source, else, if no external
clock is used, keep this define commented */
/*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#endif /* __STM32F4xx_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2011-2012 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* stm32fxxx.h - Includes correct stm32 include file.
*/
#ifndef STM32FXXX_H_
#define STM32FXXX_H_
#if defined (STM32F40_41xxx)
#include "stm32f4xx.h"
#elif defined (STM32F10X_MD)
#include "stm32f10x.h"
#else
#warning "Don't know which stm32fxxx header file to include"
#endif
#endif /* STM32FXXX_H_ */
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2011-2012 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* trace.h - ITM trace implementation/definition
*/
#ifndef __TRACE_H__
#define __TRACE_H__
#define configUSE_TRACE_FACILITY 1
// ITM useful macros
#ifndef ITM_NO_OVERFLOW
#define ITM_SEND(CH, DATA) ((uint32_t*)0xE0000000)[CH] = DATA
#else
#define ITM_SEND(CH, DATA) while(((uint32_t*)0xE0000000)[CH] == 0);\
((uint32_t*)0xE0000000)[CH] = DATA
#endif
// Send 4 first chatacters of task name to ITM port 1
#define traceTASK_SWITCHED_IN() ITM_SEND(1, *((uint32_t*)pxCurrentTCB->pcTaskName))
// Systick value on port 2
#define traceTASK_INCREMENT_TICK(xTickCount) ITM_SEND(2, xTickCount)
// Queue trace on port 3
#define ITM_QUEUE_SEND 0x0100
#define ITM_QUEUE_FAILED 0x0200
#define ITM_BLOCKING_ON_QUEUE_RECEIVE 0x0300
#define ITM_BLOCKING_ON_QUEUE_SEND 0x0400
#define traceQUEUE_SEND(xQueue) ITM_SEND(3, ITM_QUEUE_SEND | ((xQUEUE *) xQueue)->uxQueueNumber)
#define traceQUEUE_SEND_FAILED(xQueue) ITM_SEND(3, ITM_QUEUE_FAILED | ((xQUEUE *) xQueue)->uxQueueNumber)
#define traceBLOCKING_ON_QUEUE_RECEIVE(xQueue) ITM_SEND(3, ITM_BLOCKING_ON_QUEUE_RECEIVE | ((xQUEUE *) xQueue)->uxQueueNumber)
#define traceBLOCKING_ON_QUEUE_SEND(xQueue) ITM_SEND(3, ITM_BLOCKING_ON_QUEUE_SEND | ((xQUEUE *) xQueue)->uxQueueNumber)
#endif
/*
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2015 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* deck_analog.c - Arduino-compatible analog input implementation
*/
#include "deck.h"
#include "stm32fxxx.h"
static uint32_t stregResolution;
static uint32_t adcRange;
void adcInit(void)
{
/*
* Note: This function initializes only ADC2, and only for single channel, single conversion mode. No DMA, no interrupts, no bells or whistles.
*/
/* Note that this de-initializes registers for all ADCs (ADCx) */
ADC_DeInit();
/* Define ADC init structures */
ADC_InitTypeDef ADC_InitStructure;
ADC_CommonInitTypeDef ADC_CommonInitStructure;
/* Populates structures with reset values */
ADC_StructInit(&ADC_InitStructure);
ADC_CommonStructInit(&ADC_CommonInitStructure);
/* enable ADC clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);
/* init ADCs in independent mode, div clock by two */
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; /* HCLK = 168MHz, PCLK2 = 84MHz, ADCCLK = 42MHz (when using ADC_Prescaler_Div2) */
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
ADC_CommonInit(&ADC_CommonInitStructure);
/* Init ADC2: 12bit, single-conversion. For Arduino compatibility set 10bit */
analogReadResolution(12);
/* Enable ADC2 */
ADC_Cmd(ADC2, ENABLE);
}
static uint16_t analogReadChannel(uint8_t channel)
{
/* According to datasheet, minimum sampling time for 12-bit conversion is 15 cycles. */
ADC_RegularChannelConfig(ADC2, channel, 1, ADC_SampleTime_15Cycles);
/* Start the conversion */
ADC_SoftwareStartConv(ADC2);
/* Wait until conversion completion */
while(ADC_GetFlagStatus(ADC2, ADC_FLAG_EOC) == RESET);
/* Get the conversion value */
return ADC_GetConversionValue(ADC2);
}
uint16_t analogRead(uint32_t pin)
{
assert_param((pin >= 1) && (pin <= 13));
assert_param(deckGPIOMapping[pin-1].adcCh > -1);
/* Now set the GPIO pin to analog mode. */
/* Enable clock for the peripheral of the pin.*/
RCC_AHB1PeriphClockCmd(deckGPIOMapping[pin-1].periph, ENABLE);
/* Populate structure with RESET values. */
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_StructInit(&GPIO_InitStructure);
/* Initialise the GPIO pin to analog mode. */
GPIO_InitStructure.GPIO_Pin = deckGPIOMapping[pin-1].pin;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
/* TODO: Any settling time before we can do ADC after init on the GPIO pin? */
GPIO_Init(deckGPIOMapping[pin-1].port, &GPIO_InitStructure);
/* Read the appropriate ADC channel. */
return analogReadChannel((uint8_t)deckGPIOMapping[pin-1].adcCh);
}
void analogReference(uint8_t type)
{
/*
* TODO: We should probably support the Arduino EXTERNAL type here.
* TODO: Figure out which voltage reference to compensate with.
*/
assert_param(type == 0 /* DEFAULT */);
}
void analogReadResolution(uint8_t bits)
{
ADC_InitTypeDef ADC_InitStructure;
assert_param((bits >= 6) && (bits <= 12));
adcRange = 1 << bits;
switch (bits)
{
case 12: stregResolution = ADC_Resolution_12b; break;
case 10: stregResolution = ADC_Resolution_10b; break;
case 8: stregResolution = ADC_Resolution_8b; break;
case 6: stregResolution = ADC_Resolution_6b; break;
default: stregResolution = ADC_Resolution_12b; break;
}
/* Init ADC2 witch new resolution */
ADC_InitStructure.ADC_Resolution = stregResolution;
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = 0;
ADC_InitStructure.ADC_ExternalTrigConv = 0;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = 1;
ADC_Init(ADC2, &ADC_InitStructure);
}
float analogReadVoltage(uint32_t pin)
{
float voltage;
voltage = analogRead(pin) * VREF / adcRange;
return voltage;
}
/*
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2015 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* deck_constants.c - Constants for the Deck API
*/
#include "deck.h"
/* Mapping between Deck Pin number, real GPIO and ADC channel */
deckGPIOMapping_t deckGPIOMapping[13] = {
{.periph= RCC_AHB1Periph_GPIOC, .port= GPIOC, .pin=GPIO_Pin_11, .adcCh=-1}, /* RX1 */
{.periph= RCC_AHB1Periph_GPIOC, .port= GPIOC, .pin=GPIO_Pin_10, .adcCh=-1}, /* TX1 */
{.periph= RCC_AHB1Periph_GPIOB, .port= GPIOB, .pin=GPIO_Pin_7, .adcCh=-1}, /* SDA */
{.periph= RCC_AHB1Periph_GPIOB, .port= GPIOB, .pin=GPIO_Pin_6, .adcCh=-1}, /* SCL */
{.periph= RCC_AHB1Periph_GPIOB, .port= GPIOB, .pin=GPIO_Pin_8, .adcCh=-1}, /* IO1 */
{.periph= RCC_AHB1Periph_GPIOB, .port= GPIOB, .pin=GPIO_Pin_5, .adcCh=-1}, /* IO2 */
{.periph= RCC_AHB1Periph_GPIOB, .port= GPIOB, .pin=GPIO_Pin_4, .adcCh=-1}, /* IO3 */
{.periph= RCC_AHB1Periph_GPIOC, .port= GPIOC, .pin=GPIO_Pin_12, .adcCh=-1}, /* IO4 */
{.periph= RCC_AHB1Periph_GPIOA, .port= GPIOA, .pin=GPIO_Pin_2, .adcCh=ADC_Channel_2}, /* TX2 */
{.periph= RCC_AHB1Periph_GPIOA, .port= GPIOA, .pin=GPIO_Pin_3, .adcCh=ADC_Channel_3}, /* RX2 */
{.periph= RCC_AHB1Periph_GPIOA, .port= GPIOA, .pin=GPIO_Pin_5, .adcCh=ADC_Channel_5}, /* SCK */
{.periph= RCC_AHB1Periph_GPIOA, .port= GPIOA, .pin=GPIO_Pin_6, .adcCh=ADC_Channel_6}, /* MISO */
{.periph= RCC_AHB1Periph_GPIOA, .port= GPIOA, .pin=GPIO_Pin_7, .adcCh=ADC_Channel_7}, /* MOSI */
};
/*
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2015 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* digital.c - Deck-API digital IO implementation
*/
#include "deck.h"
#include "stm32fxxx.h"
void pinMode(uint32_t pin, uint32_t mode)
{
if (pin > 13) {
return;
}
RCC_AHB1PeriphClockCmd(deckGPIOMapping[pin-1].periph, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure = {0};
GPIO_InitStructure.GPIO_Pin = deckGPIOMapping[pin-1].pin;
GPIO_InitStructure.GPIO_Mode = (mode == OUTPUT) ? GPIO_Mode_OUT:GPIO_Mode_IN;
if (mode == OUTPUT) GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
if (mode == INPUT_PULLUP) GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
if (mode == INPUT_PULLDOWN) GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz;
GPIO_Init(deckGPIOMapping[pin-1].port, &GPIO_InitStructure);
}
void digitalWrite(uint32_t pin, uint32_t val)
{
if (pin > 13) {
return;
}
if (val) val = Bit_SET;
GPIO_WriteBit(deckGPIOMapping[pin-1].port, deckGPIOMapping[pin-1].pin, val);
}
int digitalRead(uint32_t pin)
{
if (pin > 13) {
return LOW;
}
int val = GPIO_ReadInputDataBit(deckGPIOMapping[pin-1].port, deckGPIOMapping[pin-1].pin);
return (val==Bit_SET)?HIGH:LOW;
}
/*
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2015 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* deck_spi.c - Deck-API SPI communication implementation
*/
#include "deck.h"
/*ST includes */
#include "stm32fxxx.h"
#include "config.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "cfassert.h"
#include "config.h"
#include "nvicconf.h"
#define SPI SPI1
#define SPI_CLK RCC_APB2Periph_SPI1
#define SPI_CLK_INIT RCC_APB2PeriphClockCmd
#define SPI_IRQ_HANDLER SPI1_IRQHandler
#define SPI_IRQn SPI1_IRQn
#define SPI_DMA_IRQ_PRIO (NVIC_HIGH_PRI)
#define SPI_DMA DMA2
#define SPI_DMA_CLK RCC_AHB1Periph_DMA2
#define SPI_DMA_CLK_INIT RCC_AHB1PeriphClockCmd
#define SPI_TX_DMA_STREAM DMA2_Stream5
#define SPI_TX_DMA_IRQ DMA2_Stream5_IRQn
#define SPI_TX_DMA_IRQHandler DMA2_Stream5_IRQHandler
#define SPI_TX_DMA_CHANNEL DMA_Channel_3
#define SPI_TX_DMA_FLAG_TCIF DMA_FLAG_TCIF5
#define SPI_RX_DMA_STREAM DMA2_Stream0
#define SPI_RX_DMA_IRQ DMA2_Stream0_IRQn
#define SPI_RX_DMA_IRQHandler DMA2_Stream0_IRQHandler
#define SPI_RX_DMA_CHANNEL DMA_Channel_3
#define SPI_RX_DMA_FLAG_TCIF DMA_FLAG_TCIF0
#define SPI_SCK_PIN GPIO_Pin_5
#define SPI_SCK_GPIO_PORT GPIOA
#define SPI_SCK_GPIO_CLK RCC_AHB1Periph_GPIOA
#define SPI_SCK_SOURCE GPIO_PinSource5
#define SPI_SCK_AF GPIO_AF_SPI1
#define SPI_MISO_PIN GPIO_Pin_6
#define SPI_MISO_GPIO_PORT GPIOA
#define SPI_MISO_GPIO_CLK RCC_AHB1Periph_GPIOA
#define SPI_MISO_SOURCE GPIO_PinSource6
#define SPI_MISO_AF GPIO_AF_SPI1
#define SPI_MOSI_PIN GPIO_Pin_7
#define SPI_MOSI_GPIO_PORT GPIOA
#define SPI_MOSI_GPIO_CLK RCC_AHB1Periph_GPIOA
#define SPI_MOSI_SOURCE GPIO_PinSource7
#define SPI_MOSI_AF GPIO_AF_SPI1
#define DUMMY_BYTE 0xA5
static bool isInit = false;
static SemaphoreHandle_t txComplete;
static SemaphoreHandle_t rxComplete;
static void spiDMAInit();
void spiBegin(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
// binary semaphores created using xSemaphoreCreateBinary() are created in a state
// such that the the semaphore must first be 'given' before it can be 'taken'
txComplete = xSemaphoreCreateBinary();
rxComplete = xSemaphoreCreateBinary();
/*!< Enable the SPI clock */
SPI_CLK_INIT(SPI_CLK, ENABLE);
/*!< Enable GPIO clocks */
RCC_AHB1PeriphClockCmd(SPI_SCK_GPIO_CLK | SPI_MISO_GPIO_CLK |
SPI_MOSI_GPIO_CLK, ENABLE);
/*!< Enable DMA Clocks */
SPI_DMA_CLK_INIT(SPI_DMA_CLK, ENABLE);
/*!< SPI pins configuration *************************************************/
/*!< Connect SPI pins to AF5 */
GPIO_PinAFConfig(SPI_SCK_GPIO_PORT, SPI_SCK_SOURCE, SPI_SCK_AF);
GPIO_PinAFConfig(SPI_MISO_GPIO_PORT, SPI_MISO_SOURCE, SPI_MISO_AF);
GPIO_PinAFConfig(SPI_MOSI_GPIO_PORT, SPI_MOSI_SOURCE, SPI_MOSI_AF);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
/*!< SPI SCK pin configuration */
GPIO_InitStructure.GPIO_Pin = SPI_SCK_PIN;
GPIO_Init(SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
/*!< SPI MOSI pin configuration */
GPIO_InitStructure.GPIO_Pin = SPI_MOSI_PIN;
GPIO_Init(SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);
/*!< SPI MISO pin configuration */
GPIO_InitStructure.GPIO_Pin = SPI_MISO_PIN;
GPIO_Init(SPI_MISO_GPIO_PORT, &GPIO_InitStructure);
/*!< SPI DMA Initialization */
spiDMAInit();
/*!< SPI configuration */
spiConfigureSlow();
isInit = true;
}
void spiDMAInit()
{
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/* Configure DMA Initialization Structure */
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_PeripheralBaseAddr =(uint32_t) (&(SPI->DR)) ;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_BufferSize = 0; // set later
DMA_InitStructure.DMA_Memory0BaseAddr = 0; // set later
// Configure TX DMA
DMA_InitStructure.DMA_Channel = SPI_TX_DMA_CHANNEL;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_Cmd(SPI_TX_DMA_STREAM,DISABLE);
DMA_Init(SPI_TX_DMA_STREAM, &DMA_InitStructure);
// Configure RX DMA
DMA_InitStructure.DMA_Channel = SPI_RX_DMA_CHANNEL;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_Cmd(SPI_RX_DMA_STREAM,DISABLE);
DMA_Init(SPI_RX_DMA_STREAM, &DMA_InitStructure);
// Configure interrupts
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_HIGH_PRI;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannel = SPI_TX_DMA_IRQ;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = SPI_RX_DMA_IRQ;
NVIC_Init(&NVIC_InitStructure);
}
void spiConfigureSlow()
{
SPI_InitTypeDef SPI_InitStructure;
SPI_I2S_DeInit(SPI);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 0; // Not used
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32; //~2.7 MHz
SPI_Init(SPI, &SPI_InitStructure);
}
void spiConfigureFast()
{
SPI_InitTypeDef SPI_InitStructure;
SPI_I2S_DeInit(SPI);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 0; // Not used
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; //~21 MHz
SPI_Init(SPI, &SPI_InitStructure);
}
bool spiTest(void)
{
return isInit;
}
bool spiExchange(size_t length, const uint8_t * data_tx, uint8_t * data_rx)
{
// DMA already configured, just need to set memory addresses
SPI_TX_DMA_STREAM->M0AR = (uint32_t)data_tx;
SPI_TX_DMA_STREAM->NDTR = length;
SPI_RX_DMA_STREAM->M0AR = (uint32_t)data_rx;
SPI_RX_DMA_STREAM->NDTR = length;
// Enable SPI DMA Interrupts
DMA_ITConfig(SPI_TX_DMA_STREAM, DMA_IT_TC, ENABLE);
DMA_ITConfig(SPI_RX_DMA_STREAM, DMA_IT_TC, ENABLE);
// Clear DMA Flags
DMA_ClearFlag(SPI_TX_DMA_STREAM, DMA_FLAG_FEIF5|DMA_FLAG_DMEIF5|DMA_FLAG_TEIF5|DMA_FLAG_HTIF5|DMA_FLAG_TCIF5);
DMA_ClearFlag(SPI_RX_DMA_STREAM, DMA_FLAG_FEIF0|DMA_FLAG_DMEIF0|DMA_FLAG_TEIF0|DMA_FLAG_HTIF0|DMA_FLAG_TCIF0);
// Enable DMA Streams
DMA_Cmd(SPI_TX_DMA_STREAM,ENABLE);
DMA_Cmd(SPI_RX_DMA_STREAM,ENABLE);
// Enable SPI DMA requests
SPI_I2S_DMACmd(SPI, SPI_I2S_DMAReq_Tx, ENABLE);
SPI_I2S_DMACmd(SPI, SPI_I2S_DMAReq_Rx, ENABLE);
// Enable peripheral
SPI_Cmd(SPI, ENABLE);
// Wait for completion
bool result = (xSemaphoreTake(txComplete, portMAX_DELAY) == pdTRUE)
&& (xSemaphoreTake(rxComplete, portMAX_DELAY) == pdTRUE);
// Disable peripheral
SPI_Cmd(SPI, DISABLE);
return result;
}
void __attribute__((used)) SPI_TX_DMA_IRQHandler(void)
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
// Stop and cleanup DMA stream
DMA_ITConfig(SPI_TX_DMA_STREAM, DMA_IT_TC, DISABLE);
DMA_ClearITPendingBit(SPI_TX_DMA_STREAM, SPI_TX_DMA_FLAG_TCIF);
// Clear stream flags
DMA_ClearFlag(SPI_TX_DMA_STREAM,SPI_TX_DMA_FLAG_TCIF);
// Disable SPI DMA requests
SPI_I2S_DMACmd(SPI, SPI_I2S_DMAReq_Tx, DISABLE);
// Disable streams
DMA_Cmd(SPI_TX_DMA_STREAM,DISABLE);
// Give the semaphore, allowing the SPI transaction to complete
xSemaphoreGiveFromISR(txComplete, &xHigherPriorityTaskWoken);
if (xHigherPriorityTaskWoken)
{
portYIELD();
}
}
void __attribute__((used)) SPI_RX_DMA_IRQHandler(void)
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
// Stop and cleanup DMA stream
DMA_ITConfig(SPI_RX_DMA_STREAM, DMA_IT_TC, DISABLE);
DMA_ClearITPendingBit(SPI_RX_DMA_STREAM, SPI_RX_DMA_FLAG_TCIF);
// Clear stream flags
DMA_ClearFlag(SPI_RX_DMA_STREAM,SPI_RX_DMA_FLAG_TCIF);
// Disable SPI DMA requests
SPI_I2S_DMACmd(SPI, SPI_I2S_DMAReq_Rx, DISABLE);
// Disable streams
DMA_Cmd(SPI_RX_DMA_STREAM,DISABLE);
// Give the semaphore, allowing the SPI transaction to complete
xSemaphoreGiveFromISR(rxComplete, &xHigherPriorityTaskWoken);
if (xHigherPriorityTaskWoken)
{
portYIELD();
}
}
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2015 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* deck.c - Deck subsystem main entry points
*/
#define DEBUG_MODULE "DECK_CORE"
#include <string.h>
#include "deck.h"
#include "debug.h"
#ifdef DEBUG
#define DECK_CORE_DBG_PRINT(fmt, ...) DEBUG_PRINT(fmt, ## __VA_ARGS__)
#else
#define DECK_CORE_DBG_PRINT(...)
#endif
#ifndef DECK_FORCE
#define DECK_FORCE
#endif
#define xstr(s) str(s)
#define str(s) #s
static char* deck_force = xstr(DECK_FORCE);
extern void deckInfoInit();
void deckInit()
{
deckDriverCount();
deckInfoInit();
#ifndef IGNORE_OW_DECKS
int nDecks;
int i;
nDecks = deckCount();
DEBUG_PRINT("%d deck enumerated\n", nDecks);
for (i=0; i<nDecks; i++) {
DeckInfo *deck = deckInfo(i);
if (deck->driver->init) {
if (deck->driver->name) {
DECK_CORE_DBG_PRINT("Calling INIT from driver %s for deck %i\n", deck->driver->name, i);
} else {
DECK_CORE_DBG_PRINT("Calling INIT for deck %i\n", i);
}
deck->driver->init(deck);
}
}
#endif
// Init build-forced driver
if (strlen(deck_force)>0) {
const DeckDriver *driver = deckFindDriverByName(deck_force);
if (!driver) {
DEBUG_PRINT("WARNING: compile-time forced driver %s not found\n", deck_force);
} else if (driver->init) {
DEBUG_PRINT("Initializing compile-time forced driver %s\n", deck_force);
driver->init(NULL); // Passing NULL as deck info
}
}
}
bool deckTest()
{
bool pass = true;
#ifndef IGNORE_OW_DECKS
int nDecks;
int i;
nDecks = deckCount();
for (i=0; i<nDecks; i++) {
DeckInfo *deck = deckInfo(i);
if (deck->driver->test) {
if (deck->driver->test()) {
DEBUG_PRINT("Deck %i test [OK].\n", i);
} else {
DEBUG_PRINT("Deck %i test [FAIL].\n", i);
pass = false;
}
}
}
#endif
// Test build-forced driver
if (strlen(deck_force)>0) {
const DeckDriver *driver = deckFindDriverByName(deck_force);
if (driver && driver->test) {
if (driver->test()) {
DEBUG_PRINT("Compile-time forced driver %s test [OK]\n", deck_force);
} else {
DEBUG_PRINT("Compile-time forced driver %s test [FAIL]\n", deck_force);
pass = false;
}
}
}
return pass;
}
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2011-2012 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* deck_drivers.c - Deck drivers loading and handling
*/
#define DEBUG_MODULE "DECK_DRIVERS"
#include <stdlib.h>
#include <string.h>
#include "deck.h"
#include "debug.h"
#ifdef DEBUG
#define DECK_DRV_DBG_PRINT(fmt, ...) DEBUG_PRINT(fmt, ## __VA_ARGS__)
#else
#define DECK_DRV_DBG_PRINT(...)
#endif
/* Symbols set by the linker script */
extern const struct deck_driver * _deckDriver_start;
extern const struct deck_driver * _deckDriver_stop;
static const struct deck_driver ** drivers;
static int driversLen;
// Init the toc access variables. Lazy initialisation: it is going to be done
// the first time any api function is called.
static void deckdriversInit() {
static bool init = false;
if (!init) {
int i;
drivers = &_deckDriver_start;
driversLen = &_deckDriver_stop - &_deckDriver_start;
init = true;
DEBUG_PRINT("Found %d drivers\n", driversLen);
for (i=0; i<driversLen; i++) {
if (drivers[i]->name) {
DECK_DRV_DBG_PRINT("VID:PID %02x:%02x (%s)\n", drivers[i]->vid, drivers[i]->pid, drivers[i]->name);
} else {
DECK_DRV_DBG_PRINT("VID:PID %02x:%02x\n", drivers[i]->vid, drivers[i]->pid);
}
}
}
}
int deckDriverCount() {
deckdriversInit();
return driversLen;
}
const struct deck_driver* deckGetDriver(int i) {
deckdriversInit();
if (i<driversLen) {
return drivers[i];
}
return NULL;
}
const DeckDriver* deckFindDriverByVidPid(uint8_t vid, uint8_t pid) {
int i;
deckdriversInit();
for (i=0; i<driversLen; i++) {
if ((vid == drivers[i]->vid) && (pid == drivers[i]->pid)) {
return drivers[i];
}
}
return NULL;
}
const DeckDriver* deckFindDriverByName(char* name) {
int i;
deckdriversInit();
for (i=0; i<driversLen; i++) {
if (!strcmp(name, drivers[i]->name)) {
return drivers[i];
}
}
return NULL;
}
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2015 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* deck_ow.c - Functions to decode the decks oneWire memory content
*/
#include <stdlib.h>
#include <stdbool.h>
#include <string.h>
#define DEBUG_MODULE "DECK_INFO"
#include "deck.h"
#include "ow.h"
#include "crc.h"
#include "debug.h"
#ifdef DEBUG
#define DECK_INFO_DBG_PRINT(fmt, ...) DEBUG_PRINT(fmt, ## __VA_ARGS__)
#else
#define DECK_INFO_DBG_PRINT(...)
#endif
static int count = 0;
static DeckInfo deckInfos[DECK_MAX_COUNT];
static void enumerateDecks(void);
void deckInfoInit()
{
static bool isInit = false;
if (isInit) return;
enumerateDecks();
isInit = true;
}
int deckCount(void)
{
return count;
}
DeckInfo * deckInfo(int i)
{
if (i<count) {
return &deckInfos[i];
}
return NULL;
}
// Dummy driver for decks that do not have a driver implemented
static const DeckDriver dummyDriver;
static const DeckDriver * findDriver(DeckInfo *deck)
{
char name[30];
const DeckDriver *driver = &dummyDriver;
deckTlvGetString(&deck->tlv, DECK_INFO_NAME, name, 30);
if (deck->vid) {
driver = deckFindDriverByVidPid(deck->vid, deck->pid);
} else if (strlen(name)>0) {
driver = deckFindDriverByName(name);
}
if (driver == NULL)
driver = &dummyDriver;
return driver;
}
void printDeckInfo(DeckInfo *info)
{
char name[30] = "NoName";
char rev[10] = "NoRev";
if (deckTlvHasElement(&info->tlv, DECK_INFO_NAME)) {
deckTlvGetString(&info->tlv, DECK_INFO_NAME, name, 30);
}
if (deckTlvHasElement(&info->tlv, DECK_INFO_REVISION)) {
deckTlvGetString(&info->tlv, DECK_INFO_REVISION, rev, 10);
}
DECK_INFO_DBG_PRINT("Deck %02x:%02x %s (Rev. %s)\n", info->vid, info->pid, name, rev);
DECK_INFO_DBG_PRINT("Used pin: %08x\n", (unsigned int)info->usedPins);
if (info->driver == &dummyDriver) {
DEBUG_PRINT("Warning! No driver found for deck.\n");
} else {
DECK_INFO_DBG_PRINT("Driver implements: [ %s%s]\n",
info->driver->init?"init ":"", info->driver->test?"test ":"");
}
}
static bool infoDecode(DeckInfo * info)
{
uint8_t crcHeader;
uint8_t crcTlv;
if (info->header != DECK_INFO_HEADER_ID) {
DEBUG_PRINT("Memory error: wrong header ID\n");
return false;
}
crcHeader = crcSlow(info->raw, DECK_INFO_HEADER_SIZE);
if(info->crc != crcHeader) {
DEBUG_PRINT("Memory error: incorrect header CRC\n");
return false;
}
if(info->raw[DECK_INFO_TLV_VERSION_POS] != DECK_INFO_TLV_VERSION) {
DEBUG_PRINT("Memory error: incorrect TLV version\n");
return false;
}
crcTlv = crcSlow(&info->raw[DECK_INFO_TLV_VERSION_POS], info->raw[DECK_INFO_TLV_LENGTH_POS]+2);
if(crcTlv != info->raw[DECK_INFO_TLV_DATA_POS + info->raw[DECK_INFO_TLV_LENGTH_POS]]) {
DEBUG_PRINT("Memory error: incorrect TLV CRC %x!=%x\n", (unsigned int)crcTlv,
info->raw[DECK_INFO_TLV_DATA_POS + info->raw[DECK_INFO_TLV_LENGTH_POS]]);
return false;
}
info->tlv.data = &info->raw[DECK_INFO_TLV_DATA_POS];
info->tlv.length = info->raw[DECK_INFO_TLV_LENGTH_POS];
return true;
}
static void enumerateDecks(void)
{
uint8_t nDecks = 0;
int i;
bool noError = true;
uint32_t usedPeriph = 0;
uint32_t usedGpio = 0;
owInit();
if (owScan(&nDecks))
{
DEBUG_PRINT("Found %d deck memor%s.\n", nDecks, nDecks>1?"ies":"y");
} else {
DEBUG_PRINT("Error scanning for deck memories, "
"no deck drivers will be initialised\n");
nDecks = 0;
}
for (i = 0; i < nDecks; i++)
{
DECK_INFO_DBG_PRINT("Enumerating deck %i\n", i);
if (owRead(i, 0, sizeof(deckInfos[0].raw), (uint8_t *)&deckInfos[i]))
{
if (infoDecode(&deckInfos[i]))
{
deckInfos[i].driver = findDriver(&deckInfos[i]);
printDeckInfo(&deckInfos[i]);
// Check for Periph and Gpio conflict
if (usedPeriph & deckInfos[i].driver->usedPeriph) {
DEBUG_PRINT("ERROR: Driver Periph usage conflicts with a "
"previously enumerated deck driver. No decks will be "
"initialized!\n");
noError = false;
}
if (usedGpio & deckInfos[i].driver->usedGpio) {
DEBUG_PRINT("ERROR: Driver Gpio usage conflicts with a "
"previously enumerated deck driver. No decks will be "
"initialized!\n");
noError = false;
}
usedPeriph |= deckInfos[i].driver->usedPeriph;
usedGpio |= deckInfos[i].driver->usedGpio;
} else {
#ifdef DEBUG
DEBUG_PRINT("Deck %i has corrupted OW memory. "
"Ignoring the deck in DEBUG mode.\n", i);
deckInfos[i].driver = &dummyDriver;
#else
DEBUG_PRINT("Deck %i has corrupted OW memory. "
"No driver will be initialized!\n", i);
noError = false;
#endif
}
}
else
{
DEBUG_PRINT("Reading deck nr:%d [FAILED]. "
"No driver will be initialized!\n", i);
noError = false;
}
}
if (noError) {
count = nDecks;
}
return;
}
/****** Key/value area handling ********/
static int findType(TlvArea *tlv, int type) {
int pos = 0;
while (pos < tlv->length) {
if (tlv->data[pos] == type) {
return pos;
} else {
pos += tlv->data[pos+1]+2;
}
}
return -1;
}
bool deckTlvHasElement(TlvArea *tlv, int type) {
return findType(tlv, type) >= 0;
}
int deckTlvGetString(TlvArea *tlv, int type, char *string, int length) {
int pos = findType(tlv, type);
int strlength = 0;
if (pos >= 0) {
strlength = tlv->data[pos+1];
if (strlength > (length-1)) {
strlength = length-1;
}
memcpy(string, &tlv->data[pos+2], strlength);
string[strlength] = '\0';
return strlength;
} else {
string[0] = '\0';
return -1;
}
}
char* deckTlvGetBuffer(TlvArea *tlv, int type, int *length) {
int pos = findType(tlv, type);
if (pos >= 0) {
*length = tlv->data[pos+1];
return (char*) &tlv->data[pos+2];
}
return NULL;
}
void deckTlvGetTlv(TlvArea *tlv, int type, TlvArea *output) {
output->length = 0;
output->data = (uint8_t *)deckTlvGetBuffer(tlv, type, &output->length);
}
/*
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2015 Bitcraze AB
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, in version 3.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* deck_test.c - Test utility functions for testing decks.
*/
#include <string.h>
#include "stm32fxxx.h"
#include "deck.h"
#include "deck_test.h"
#include "debug.h"
#ifndef DECK_TEST_PRINT_ALL_FAILED
#define STATUS_EVAL (*status)
#else
#define STATUS_EVAL 1
#endif
void decktestEval(bool result, char *failString, bool *status)
{
if (STATUS_EVAL)
{
if (!result)
{
consolePrintf("%s [FAIL]\n", failString);
*status = false;
}
else
{
*status = true;
}
}
}
void decktestSaveGPIOStatesABC(GpioRegBuf *gpioRegBuf)
{
// Save GPIO registers
memcpy(&gpioRegBuf->gpioBuffA, GPIOA, sizeof(GPIO_TypeDef));
memcpy(&gpioRegBuf->gpioBuffB, GPIOB, sizeof(GPIO_TypeDef));
memcpy(&gpioRegBuf->gpioBuffC, GPIOC, sizeof(GPIO_TypeDef));
}
void decktestRestoreGPIOStatesABC(GpioRegBuf *gpioRegBuf)
{
// Restore GPIO registers
memcpy(GPIOA, &gpioRegBuf->gpioBuffA, sizeof(GPIO_TypeDef));
memcpy(GPIOB, &gpioRegBuf->gpioBuffB, sizeof(GPIO_TypeDef));
memcpy(GPIOC, &gpioRegBuf->gpioBuffC, sizeof(GPIO_TypeDef));
}
#ifndef __LEDRING12_H__
#define __LEDRING12_H__
#include <stdint.h>
#include <stdbool.h>
#define NBR_LEDS 12
extern uint8_t ledringmem[NBR_LEDS * 2];
#endif //__LEDRING12_H__
/**
* || ____ _ __
* +------+ / __ )(_) /_______________ _____ ___
* | 0xBC | / __ / / __/ ___/ ___/ __ `/_ / / _ \
* +------+ / /_/ / / /_/ /__/ / / /_/ / / /_/ __/
* || || /_____/_/\__/\___/_/ \__,_/ /___/\___/
*
* Crazyflie control firmware
*
* Copyright (C) 2016 Bitcraze AB
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* locodeck.h: Dwm1000 deck driver.
*/
#ifndef __LOCODECK_H__
#define __LOCODECK_H__
#include "libdw1000.h"
#include "stabilizer_types.h"
#define SPEED_OF_LIGHT 299792458.0
// Timestamp counter frequency
#define LOCODECK_TS_FREQ (499.2e6 * 128)
typedef enum uwbEvent_e {
eventTimeout,
eventPacketReceived,
eventPacketSent,
eventReceiveTimeout,
eventReceiveFailed,
} uwbEvent_t;
#define LOCODECK_NR_OF_ANCHORS 6
typedef uint64_t locoAddress_t;
typedef struct {
const uint64_t antennaDelay;
const int rangingFailedThreshold;
const locoAddress_t tagAddress;
const locoAddress_t anchorAddress[LOCODECK_NR_OF_ANCHORS];
point_t anchorPosition[LOCODECK_NR_OF_ANCHORS];
bool anchorPositionOk;
float distance[LOCODECK_NR_OF_ANCHORS];
float pressures[LOCODECK_NR_OF_ANCHORS];
int failedRanging[LOCODECK_NR_OF_ANCHORS];
volatile uint16_t rangingState;
} lpsAlgoOptions_t;
// Callback for one uwb algorithm
typedef struct uwbAlgorithm_s {
void (*init)(dwDevice_t *dev, lpsAlgoOptions_t* options);
uint32_t (*onEvent)(dwDevice_t *dev, uwbEvent_t event);
} uwbAlgorithm_t;
#include <FreeRTOS.h>
#define MAX_TIMEOUT portMAX_DELAY
#endif // __LOCODECK_H__