Commit d4d018a1 authored by Jonas Künzli's avatar Jonas Künzli Committed by overleaf
Browse files

Update on Overleaf.

parent 9cc8f882
......@@ -16,7 +16,7 @@ Advantages and properties of embedded OS
\item OS can be fitted to individual need: Remove unused functions, conditional compilation depending on hardware, replace dynamic data by static data
\item Improved predictability because of scheduler
\item Interrupts can be employed by any process
\item Device drivers handled by tasks instead of hidden drivers $\implies$ everything goes through scheduler\\
\item Device drivers handled by tasks instead of hidden drivers $\implies$ everything goes through scheduler, improves timing predictability\\
\includegraphics[width=1\linewidth]{RTOS_drivers}
\item Protection mechanisms not always necessary (Processes tested and considered reliable). $\implies$ Tasks can do their own I/O, including interrupts
\end{compactitem}
......
......@@ -149,7 +149,9 @@ Task must finish execution within its deadline and not later than the maximum st
\item $\Gamma$: denotes a set of periodic tasks
\item $\tau_i$: denotes a periodic task
\item $\tau_{i,j}$ : denotes the $j$th instance of task $i$
\item $r_{i,j}, s_{i,j}, f_{i,j}, d_{i,j}$: denote the release time, start time, finishing time, absolute deadline of the $j$th instance of task $i$
\item $r_{i,j}, s_{i,j}, f_{i,j}, d_{i,j}$: denote the release time, start time, finishing time, absolute deadline of the $j$th instance of task $i$\\
$r_{i,j}=\phi_i+(j-1)T_i$\\
$d_ij=\phi_i+(j-1)T_i+D_i$\\
\item $\Phi_i$: denotes the phase of task $i$ (release time of its first instance)
\item $D_i$: denotes the relative deadline of task $i$
\item $T_i$: denotes the period of task $i$
......@@ -165,11 +167,12 @@ Fixed / static priorities, independent, preemptive, deadlines equal the periods,
\textbf{Schedulability Condition: } (sufficient but not necessary)
$$U=\sum_{i=1}^{n} \frac{C_i}{T_i} \leq n(2^{1/n}-1) \implies \text{schedulability}$$
where $U$ is the \textcolor{red}{processor utilization factor}. $\lim\limits_{n \to \infty} n(2^{1/n}-1) \approx 0.7$
where $U$ is the \textcolor{red}{processor utilization factor}= fraction of processor time spent in execution of tasks. $\lim\limits_{n \to \infty} n(2^{1/n}-1) \approx 0.7$
\includegraphics[width=0.5\linewidth]{RM_sufficiency}
As a sufficient and necessary test, you can simulate it or do algorithm of DM section.
\vspace{2mm}
\textbf{Critical Instant}: The time at which the release of the task will produce the largest response time. It is if that task is simultaneously released with all higher priority tasks.
$\implies$ If there are no phase shifts, simulate the beginning (till all deadlines have passed). If that works, the schedule is feasible.
......
......@@ -25,9 +25,14 @@ ES are expected to finish tasks reliably within time bounds.\\ Essential: Upper
\item schedule computed offline $\implies$ can use complex algorithm
\item deterministic at runtime (schedule is fixed)
\item interaction with environment through polling
\item no problem using shared resources
\item deterministic schedule; conceptually simple (static table)
\item easy to validate, test etc.
\item Possible Extensions:
\subitem Allow interrupts
\subitem Allow preemptable background tasks
\item not flexible as no adaptation to the environment
\item problems with long tasks
\end{compactitem}
~\newline
......@@ -80,6 +85,7 @@ ES are expected to finish tasks reliably within time bounds.\\ Essential: Upper
\item $d_{i,j} = r_{i,j} + D_i$: Absolute deadline
\item $s_i$: Start time, when the task starts its execution
\item $f_i$: Finishing time, when the task finishes execution
\item $f_ij$: number of the frame in which instance j of task $\tau_i$ executes
\item $\Phi_i$: Relative phase (release time of first instance)
\item $D_i$: Relative deadline of task $i$
\item $C_i$: WCET of task $i$
......@@ -113,7 +119,7 @@ Period $P$ is least common multiple of all periods $T_i$.\\
\begin{itemize}
\item is P a common multiple of all Periods $T_i$?
\item is P a multiple of f?
\item is the frame sufficient long?\\$\sum_i C_i \leq f$ $\forall f$
\item is the frame sufficient long?\\$\sum_i C_i \leq f$ $\forall 1\leq k\leq P/f $
\item instances of a task start after release time:\\
$\phi_i=min_{1\leq j \leq \frac{P}{T_i}}\{(f_{ij}-1)f-(j-1)T_i\}$ $\forall \tau_i$
\item deadlines respected?\\
......
......@@ -145,7 +145,7 @@ $$\forall v_i \in V_C\setminus\{v_0\}: \quad \tau(v_i) = -\infty$$
%}
% \end{python}
Produces the following (indep. of priorities)\\
Produces the following Ablaufplan (indep. of priorities)\\
\includegraphics[width=0.3\linewidth]{list_scheduling}
\textcolor{red}{\textbf{Integer Linear Programming (10-50)}}
......@@ -255,7 +255,8 @@ Iterative Algorithms consist of a set of indexed equations that are evaluated fo
\item \textbf{Simple possibility:}edges with $d_ij>0$ are removed from the extended sequence graph. The resulting sequence graph is implemented using standard methods.\\
\includegraphics[width=\linewidth]{images/simple.JPG}
\item \textbf{Functional pipelining:} Successive iterations overlap and higher throughput ($1/P$) is obtained\\
Calculate P with help of timing constraints.\\
Calculate P with help of timing constraints:\\
$\tau(f_j)-\tau(f_i)\geq w(f_i)-d_{ij}\cdot P, \forall (f_i,f_j)\in E_S$\\
with unlimited resources:\\
\includegraphics[width=\linewidth]{images/pipe.JPG}
\end{itemize}
......
\ownsection{Exercises and Laboratory (ES-Lab)}
\ownsubsection{Interrupts}
By default all interrupts are disabled. The following steps are necessary to
configure a GPIO interrupt on the MSP432.
\begin{enumerate}
\item Configuring the GPIO pin as an input. \\
GPIO\_setAsInputPinWithPullUpResistor()
\item Selecting the edge (clock signal) which will trigger the interrupt. \\
GPIO\_interruptEdgeSelect()
\item Clearing the pin’s interrupt flag. This makes sure that no previous interrupts are handled. (This step is not mandatory but it’s good practice to do it.) \\
GPIO\_clearInterruptFlag()
\item Set the interrupt enable (IE) bit of the specific GPIO pin (enabling the interrupt in the peripheral). \\
GPIO\_enableInterrupt()
\item Set the interrupt enable (IE) bit of the corresponding interrupt source (enabling the interrupt in the interrupt controller). \\
Interrupt\_enableInterrupt()
\item Enabling interrupts globally (set global interrupt enable (GIE) bit). Interrupt\_enableMaster() \\
\end{enumerate}
\ownsubsection{Code Interrupt}
\begin{python}
volatile bool buttonFlag = false;
void main() {
configureGpioAndInterrupt ();
while (1) {
PCM_gotoLPM3 (); // Go to low power mode and wait for interrupt
if(flag == true) {
togglePin(LED_PORT , LED_PIN);
buttonFlag = false;
}
}
}
void BUTTON_PORT_IRQHandler(void) {
status = getEnabledInterruptStatus(BUTTON_PORT);
if(status & GPIO_PIN) {
buttonFlag = true;
clearInterrupt(BUTTON_PORT);
}
}
\end{python}
\ownsubsection{Interrupt GPIO setup}
\begin{python}
/* Configuring P2.1 (LED2 green) and P2.2 (LED2 blue) as output */
GPIO_setAsOutputPin(GPIO_PORT_P2 , GPIO_PIN1);
GPIO_setAsOutputPin(GPIO_PORT_P2 , GPIO_PIN2);
/* Configuring P1.1 (Button S1) and P1.4 (Button S2) as an input */
GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P1 , GPIO_PIN1);
GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P1 , GPIO_PIN4);
/* Configure interrupts for buttons S1 and S2 */
// Configure P1.1
GPIO_interruptEdgeSelect(GPIO_PORT_P1 , GPIO_PIN1 , GPIO_LOW_TO_HIGH_TRANSITION);
GPIO_clearInterruptFlag(GPIO_PORT_P1 , GPIO_PIN1);
// Configure P1.4
GPIO_interruptEdgeSelect(GPIO_PORT_P1 , GPIO_PIN4 , GPIO_LOW_TO_HIGH_TRANSITION);
GPIO_clearInterruptFlag(GPIO_PORT_P1 , GPIO_PIN4);
/* Enable interrupts for both GPIO pins */
GPIO_enableInterrupt(GPIO_PORT_P1 , GPIO_PIN1);
GPIO_enableInterrupt(GPIO_PORT_P1 , GPIO_PIN4);
/* Enable interrupts on Port 1 */
Interrupt_enableInterrupt(INT_PORT1);
/* Enable interrupts globally */
Interrupt_enableMaster ();
/* Initially turn LEDs off */
GPIO_setOutputLowOnPin(GPIO_PORT_P2 , GPIO_PIN1);
GPIO_setOutputLowOnPin(GPIO_PORT_P2 , GPIO_PIN2);
\end{python}
\ownsubsection{Generating Periodic Interrupts}
\begin{python}
/* Timer_A0 up mode configuration parameters */
const Timer_A_UpModeConfig upConfigA0 =
{
TIMER_A_CLOCKSOURCE_SMCLK , // SMCLK clock source (3MHz)
TIMER_A_CLOCKSOURCE_DIVIDER_64 ,// SMCLK /64 = 46.875 kHz
TA0_CCR0 , // Value in CCR0 , NOTE: limited to 16 bit!
TIMER_A_TAIE_INTERRUPT_DISABLE ,// Disable timer roll -over interrupt
TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE , // Enable CCR0 interrupt
TIMER_A_DO_CLEAR // Clear value in the timer counter register
};
/* Configuring P1.0 (LED1) as output */
GPIO_setAsOutputPin(GPIO_PORT_P1 , GPIO_PIN0);
GPIO_setOutputLowOnPin(GPIO_PORT_P1 , GPIO_PIN0);
/* Configuring Timer_A0 for Up mode */
Timer_A_configureUpMode(TIMER_A0_BASE , &upConfigA0);
/* Clear interrupt */
Timer_A_clearCaptureCompareInterrupt(TIMER_A0_BASE , TIMER_A_CAPTURECOMPARE_REGISTER_0);
/* Enable interrupt */
Interrupt_enableInterrupt(INT_TA0_0);
/* Enable interrupts globally */
Interrupt_enableMaster ();
/* Start the Timer_A0 */
Timer_A_startCounter(TIMER_A0_BASE , TIMER_A_UP_MODE);
\end{python}
\begin{python}
void TA0_0_IRQHandler(void)
{
/* Toggle LED1 */
GPIO_toggleOutputOnPin(GPIO_PORT_P1 , GPIO_PIN0);
/* Clear interrupt of timer A0 */
Timer_A_clearCaptureCompareInterrupt(TIMER_A0_BASE ,
TIMER_A_CAPTURECOMPARE_REGISTER_0);
}
\end{python}
\ownsubsection{PWM}
Additionally, a mapping of the output TA1CCR1 to the LED must be done.
\begin{python}
/* Timer_A1 up mode configuration parameters */
const Timer_A_UpModeConfig upConfigA1 =
{
TIMER_A_CLOCKSOURCE_SMCLK , // SMCLK clock source
TIMER_A_CLOCKSOURCE_DIVIDER_1 ,// SMCLK /1 = 3MHz
PWM_CCR0 , // Value in CCR0
TIMER_A_TAIE_INTERRUPT_DISABLE , // Disable Timer interrupt
TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE ,// Disable CCR0 interrupt
TIMER_A_DO_CLEAR // Clear value
};
/* Timer_A1 compare configuration parameters */
Timer_A_CompareModeConfig compareConfigA1 =
{
TIMER_A_CAPTURECOMPARE_REGISTER_1 ,// Use CCR1 as compare register
TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE , // Disable CCR interrupt
TIMER_A_OUTPUTMODE_TOGGLE_RESET , // Toggle -reset output mode
125 // Compare value (CCR1)
};
/* Configure the compare functionality of Timer_A1 */
Timer_A_initCompare(TIMER_A1_BASE , &compareConfigA1);
/* Configure Timer_A1 for Up Mode */
Timer_A_configureUpMode(TIMER_A1_BASE , &upConfigA1);
/* Start counter of Timer_A1 */
Timer_A_startCounter(TIMER_A1_BASE , TIMER_A_UP_MODE);
\end{python}
\ownsubsection{RTOS}
Create a task: \\
\begin{python}
BaseType_t xTaskCreate( TaskFunction_t pvTaskCode , // Pointer to the task function
const char * const pcName , // Descriptive name of the task
uint16_t usStackDepth , // Stack size allocated for the task
void *pvParameters , // Task specific parameters
UBaseType_t uxPriority , // Priority of the task
TaskHandle_t *pxCreatedTask // Handle to the task
);
\end{python}
\begin{python}
void vTaskAFunction(void *pvParameters) {
char *message = (char*) pvParameters;
uart_println("Start TaskA.");
while (1) {
uart_println(message);
vSimpleDelay ();
}
}
\end{python}
\ownsubsection{Task Handle}
A task can be deleted with the vTaskDelete() function, which requires a task handle as argument in order to delete a task. Each task can be assigned a handle with the
pxCreatedTask argument at task creation. If we want to delete a task from within its task function, we can simply use NULL as the argument to vTaskDelete().
\ownsubsection{Critical Sections and Priorities}
First, create a global mutex xSemaphoreCreateMutex() in the main() then we can take and give the semaphor for the critical section.
\begin{python}
// Function to create a new mutex and get its handle
SemaphoreHandle_t xSemaphoreCreateMutex( void );
// Function to take the mutex
xSemaphoreTake( SemaphoreHandle_t xSemaphore ,
// Handle to the mutex
TickType_t xTicksToWait );
// Number of ticks to wait before
// returning it automatically
// Function to return the mutex
xSemaphoreGive( SemaphoreHandle_t xSemaphore ); // Handle to the mutex
\end{python}
\ownsubsection{Queues}
\begin{python}
QueueHandle_t xQueueCreate( UBaseType_t uxQueueLength , // Number of items in the queue
UBaseType_t uxItemSize // Size of item in byte
);
BaseType_t xQueueSendToBack( QueueHandle_t xQueue , // Queue handle
const void *pvItemToQueue , // Pointer to the item to be send
TickType_t xTicksToWait // Ticks until moved to ready state
);
BaseType_t xQueueReceive( QueueHandle_t xQueue , // Queue handle
void *const pvBuffer , // Copy of the item to be received
TickType_t xTicksToWait // Ticks until moved to ready state
);
\end{python}
......@@ -38,7 +38,7 @@ Main sources:
$f$ : & \quad Clock Frequency \\
$V_T$ : & \quad Threshold Voltage $V_T \ll V_{dd}$
\end{tabularx}
$P\propto V_{dd}^2$ and $f\propto V_{dd}^2$ so $P\propto V_{dd}^3$ \\
$P\propto V_{dd}^2$ and $f\propto V_{dd}$ so $P\propto V_{dd}^3$ \\
leakage ignored
\ownsubsection{Basic Techniques (9-16)}
......@@ -161,7 +161,7 @@ The energy consumption will then be chosen, such that the battery is full, when
To find an optimal use function.\\
We do not know the future energy harvesting correctly. To deal with that, we use a estimation of the future harvested energy $\tilde{p}(\tau)$ \\
Instead of calculating the optimal use function only once and stick to it, we now calculate the best use function repedeatly using the actual battery level. \\
Instead of calculating the optimal use function only once and stick to it, we now calculate the best use function repeatedly using the actual battery level. \\
\begin{lstlisting}[style=py]
......
% !TeX root = ../main.tex
\ownsection{System Components}
\ownsection{System Components (8)}
\begin{center}
\includegraphics[width=\columnwidth]{sys1}
\end{center}
\ownsubsection{General-purpose processors (7-7)} \oldline
\ownsubsection{General-purpose processors (8-9)} \oldline
\begin{compactitem}
\item High performance: Highly optimized, use of parallelism, complex memory hierarchy
\item Not suited for real-time applications: Execution times unpredictable because of intensive resource sharing and dynamic decisions
......@@ -16,7 +16,7 @@
\subitem Often only limited parallelism in embedded applications
\end{compactitem} ~\newline
\ownsubsection{System Specialization (7-12)}
\ownsubsection{System Specialization (8-16)}
$\to$ The main difference between general purpose processors and embedded systems.
\begin{compactitem}
......
......@@ -55,6 +55,8 @@
\input{chapters/architectureModels.tex}
\newpage
\input{chapters/architectureSynthesis.tex}
\newpage
\input{chapters/labs.tex}
\end{multicols*}
\end{document}
......
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