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## Where can I buy the DPP2 LoRa communication board for debugging on the desk?
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The DPP2 LoRa comboard that is used on FlockLab is a custom board and not available as an off-the-shelf component. Since the [hardware design files](https://gitlab.ethz.ch/tec/public/dpp/dpp/-/tree/master/hardware/dpp2_sx1262) are open-source, you can manufacture your own boards (Gerber files available upon request). However, this is very cost-intensive for small batch sizes. Therefore, it may be a more economical option to buy a NUCLEO-L476RG and SX1262MB2CAS shield instead. The hardware is obviously slightly different, which necessitates adjustments to clock, GPIO and peripheral configuration. Our [LWB sample code](https://gitlab.ethz.ch/tec/public/flora/lwb) has a separate branch ([`nucleo-devkit`](https://gitlab.ethz.ch/tec/public/flora/lwb/-/tree/nucleo-devkit)) which is compatible with the mentioned nucleo board and SX1262 shield. |
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The DPP2 LoRa comboard that is used on FlockLab is a custom board and not available as an off-the-shelf component. Since the [hardware design files](https://gitlab.ethz.ch/tec/public/dpp/dpp/-/tree/master/hardware/dpp2_sx1262) are open-source, you can manufacture your own boards (Gerber files available upon request). However, this is very cost-intensive for small batch sizes. Therefore, it may be a more economical option to buy a NUCLEO-L476RG and SX1262MB2CAS shield instead. The hardware is obviously slightly different, which necessitates adjustments to clock, GPIO and peripheral configuration. Our [LWB sample code](https://gitlab.ethz.ch/tec/public/flora/lwb) has a separate branch ([`nucleo-devkit`](https://gitlab.ethz.ch/tec/public/flora/lwb/-/tree/nucleo-devkit)) which is compatible with the mentioned nucleo board and SX1262 shield.
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## Why is the results plot generated with the FlockLab Tools so sluggish, and how can I make it more responsive?
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The reason for slow plot is usually a large GPIO tracing or power profiling file. The only ways to make it more responsive is to use a more powerful machine to render the plot or to reduce the amount of tracing and profiling data, i.e.:
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* Remove the power profiling file from the results directory before invoking `flocklab -x` if you don't need to visualize the power data.
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* Try to reduce the number of pin toggles in your code (also watch for erratic toggles due to floating pins).
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* If you can't reduce the number of pin toggles, you might consider to plot only part of the GPIO trace. Use [this script](https://gitlab.ethz.ch/tec/public/flocklab/server/-/blob/master/tools/extract_subtrace.py) to extract a certain time frame from the tracing data. |
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