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/**
******************************************************************************
* @file stm32l4xx_hal_dma_ex.h
* @author MCD Application Team
* @brief Header file of DMA HAL extension module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_HAL_DMA_EX_H
#define STM32L4xx_HAL_DMA_EX_H
#ifdef __cplusplus
extern "C" {
#endif
#if defined(DMAMUX1)
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
/** @addtogroup DMAEx
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup DMAEx_Exported_Types DMAEx Exported Types
* @{
*/
/**
* @brief HAL DMA Synchro definition
*/
/**
* @brief HAL DMAMUX Synchronization configuration structure definition
*/
typedef struct
{
uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode.
This parameter can be a value of @ref DMAEx_DMAMUX_SyncSignalID_selection */
uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized.
This parameter can be a value of @ref DMAEx_DMAMUX_SyncPolarity_selection */
FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled
This parameter can take the value ENABLE or DISABLE*/
FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached.
This parameter can take the value ENABLE or DISABLE */
uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event
This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
}HAL_DMA_MuxSyncConfigTypeDef;
/**
* @brief HAL DMAMUX request generator parameters structure definition
*/
typedef struct
{
uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator
This parameter can be a value of @ref DMAEx_DMAMUX_SignalGeneratorID_selection */
uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated.
This parameter can be a value of @ref DMAEx_DMAMUX_RequestGeneneratorPolarity_selection */
uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event
This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
}HAL_DMA_MuxRequestGeneratorConfigTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup DMAEx_Exported_Constants DMAEx Exported Constants
* @{
*/
/** @defgroup DMAEx_DMAMUX_SyncSignalID_selection DMAMUX SyncSignalID selection
* @{
*/
#define HAL_DMAMUX1_SYNC_EXTI0 0U /*!< Synchronization Signal is EXTI0 IT */
#define HAL_DMAMUX1_SYNC_EXTI1 1U /*!< Synchronization Signal is EXTI1 IT */
#define HAL_DMAMUX1_SYNC_EXTI2 2U /*!< Synchronization Signal is EXTI2 IT */
#define HAL_DMAMUX1_SYNC_EXTI3 3U /*!< Synchronization Signal is EXTI3 IT */
#define HAL_DMAMUX1_SYNC_EXTI4 4U /*!< Synchronization Signal is EXTI4 IT */
#define HAL_DMAMUX1_SYNC_EXTI5 5U /*!< Synchronization Signal is EXTI5 IT */
#define HAL_DMAMUX1_SYNC_EXTI6 6U /*!< Synchronization Signal is EXTI6 IT */
#define HAL_DMAMUX1_SYNC_EXTI7 7U /*!< Synchronization Signal is EXTI7 IT */
#define HAL_DMAMUX1_SYNC_EXTI8 8U /*!< Synchronization Signal is EXTI8 IT */
#define HAL_DMAMUX1_SYNC_EXTI9 9U /*!< Synchronization Signal is EXTI9 IT */
#define HAL_DMAMUX1_SYNC_EXTI10 10U /*!< Synchronization Signal is EXTI10 IT */
#define HAL_DMAMUX1_SYNC_EXTI11 11U /*!< Synchronization Signal is EXTI11 IT */
#define HAL_DMAMUX1_SYNC_EXTI12 12U /*!< Synchronization Signal is EXTI12 IT */
#define HAL_DMAMUX1_SYNC_EXTI13 13U /*!< Synchronization Signal is EXTI13 IT */
#define HAL_DMAMUX1_SYNC_EXTI14 14U /*!< Synchronization Signal is EXTI14 IT */
#define HAL_DMAMUX1_SYNC_EXTI15 15U /*!< Synchronization Signal is EXTI15 IT */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 16U /*!< Synchronization Signal is DMAMUX1 Channel0 Event */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 17U /*!< Synchronization Signal is DMAMUX1 Channel1 Event */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 18U /*!< Synchronization Signal is DMAMUX1 Channel2 Event */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH3_EVT 19U /*!< Synchronization Signal is DMAMUX1 Channel3 Event */
#define HAL_DMAMUX1_SYNC_LPTIM1_OUT 20U /*!< Synchronization Signal is LPTIM1 OUT */
#define HAL_DMAMUX1_SYNC_LPTIM2_OUT 21U /*!< Synchronization Signal is LPTIM2 OUT */
#define HAL_DMAMUX1_SYNC_DSI_TE 22U /*!< Synchronization Signal is DSI Tearing Effect */
#define HAL_DMAMUX1_SYNC_DSI_EOT 23U /*!< Synchronization Signal is DSI End of refresh */
#define HAL_DMAMUX1_SYNC_DMA2D_EOT 24U /*!< Synchronization Signal is DMA2D End of Transfer */
#define HAL_DMAMUX1_SYNC_LDTC_IT 25U /*!< Synchronization Signal is LDTC IT */
/**
* @}
*/
/** @defgroup DMAEx_DMAMUX_SyncPolarity_selection DMAMUX SyncPolarity selection
* @{
*/
#define HAL_DMAMUX_SYNC_NO_EVENT 0U /*!< block synchronization events */
#define HAL_DMAMUX_SYNC_RISING ((uint32_t)DMAMUX_CxCR_SPOL_0) /*!< synchronize with rising edge events */
#define HAL_DMAMUX_SYNC_FALLING ((uint32_t)DMAMUX_CxCR_SPOL_1) /*!< synchronize with falling edge events */
#define HAL_DMAMUX_SYNC_RISING_FALLING ((uint32_t)DMAMUX_CxCR_SPOL) /*!< synchronize with rising and falling edge events */
/**
* @}
*/
/** @defgroup DMAEx_DMAMUX_SignalGeneratorID_selection DMAMUX SignalGeneratorID selection
* @{
*/
#define HAL_DMAMUX1_REQ_GEN_EXTI0 0U /*!< Request generator Signal is EXTI0 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI1 1U /*!< Request generator Signal is EXTI1 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI2 2U /*!< Request generator Signal is EXTI2 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI3 3U /*!< Request generator Signal is EXTI3 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI4 4U /*!< Request generator Signal is EXTI4 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI5 5U /*!< Request generator Signal is EXTI5 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI6 6U /*!< Request generator Signal is EXTI6 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI7 7U /*!< Request generator Signal is EXTI7 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI8 8U /*!< Request generator Signal is EXTI8 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI9 9U /*!< Request generator Signal is EXTI9 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI10 10U /*!< Request generator Signal is EXTI10 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI11 11U /*!< Request generator Signal is EXTI11 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI12 12U /*!< Request generator Signal is EXTI12 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI13 13U /*!< Request generator Signal is EXTI13 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI14 14U /*!< Request generator Signal is EXTI14 IT */
#define HAL_DMAMUX1_REQ_GEN_EXTI15 15U /*!< Request generator Signal is EXTI15 IT */
#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT 16U /*!< Request generator Signal is DMAMUX1 Channel0 Event */
#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT 17U /*!< Request generator Signal is DMAMUX1 Channel1 Event */
#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT 18U /*!< Request generator Signal is DMAMUX1 Channel2 Event */
#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT 19U /*!< Request generator Signal is DMAMUX1 Channel3 Event */
#define HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT 20U /*!< Request generator Signal is LPTIM1 OUT */
#define HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT 21U /*!< Request generator Signal is LPTIM2 OUT */
#define HAL_DMAMUX1_REQ_GEN_DSI_TE 22U /*!< Request generator Signal is DSI Tearing Effect */
#define HAL_DMAMUX1_REQ_GEN_DSI_EOT 23U /*!< Request generator Signal is DSI End of refresh */
#define HAL_DMAMUX1_REQ_GEN_DMA2D_EOT 24U /*!< Request generator Signal is DMA2D End of Transfer */
#define HAL_DMAMUX1_REQ_GEN_LTDC_IT 25U /*!< Request generator Signal is LTDC IT */
/**
* @}
*/
/** @defgroup DMAEx_DMAMUX_RequestGeneneratorPolarity_selection DMAMUX RequestGeneneratorPolarity selection
* @{
*/
#define HAL_DMAMUX_REQ_GEN_NO_EVENT 0U /*!< block request generator events */
#define HAL_DMAMUX_REQ_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */
#define HAL_DMAMUX_REQ_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */
#define HAL_DMAMUX_REQ_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup DMAEx_Exported_Functions
* @{
*/
/* IO operation functions *****************************************************/
/** @addtogroup DMAEx_Exported_Functions_Group1
* @{
*/
/* ------------------------- REQUEST -----------------------------------------*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma,
HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
/* -------------------------------------------------------------------------- */
/* ------------------------- SYNCHRO -----------------------------------------*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);
/* -------------------------------------------------------------------------- */
void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma);
/**
* @}
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup DMAEx_Private_Macros DMAEx Private Macros
* @brief DMAEx private macros
* @{
*/
#define IS_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_LDTC_IT)
#define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
#define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \
((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \
((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \
((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING))
#define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE))
#define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \
((EVENT) == ENABLE))
#define IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQ_GEN_LTDC_IT)
#define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
#define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQ_GEN_NO_EVENT) || \
((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING) || \
((POLARITY) == HAL_DMAMUX_REQ_GEN_FALLING) || \
((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING_FALLING))
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* DMAMUX1 */
#ifdef __cplusplus
}
#endif
#endif /* STM32L4xx_HAL_DMA_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
******************************************************************************
* @file stm32l4xx_hal_dsi.h
* @author MCD Application Team
* @brief Header file of DSI HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_HAL_DSI_H
#define STM32L4xx_HAL_DSI_H
#ifdef __cplusplus
extern "C" {
#endif
#if defined(DSI)
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
/** @defgroup DSI DSI
* @brief DSI HAL module driver
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief DSI Init Structure definition
*/
typedef struct
{
uint32_t AutomaticClockLaneControl; /*!< Automatic clock lane control
This parameter can be any value of @ref DSI_Automatic_Clk_Lane_Control */
uint32_t TXEscapeCkdiv; /*!< TX Escape clock division
The values 0 and 1 stop the TX_ESC clock generation */
uint32_t NumberOfLanes; /*!< Number of lanes
This parameter can be any value of @ref DSI_Number_Of_Lanes */
}DSI_InitTypeDef;
/**
* @brief DSI PLL Clock structure definition
*/
typedef struct
{
uint32_t PLLNDIV; /*!< PLL Loop Division Factor
This parameter must be a value between 10 and 125 */
uint32_t PLLIDF; /*!< PLL Input Division Factor
This parameter can be any value of @ref DSI_PLL_IDF */
uint32_t PLLODF; /*!< PLL Output Division Factor
This parameter can be any value of @ref DSI_PLL_ODF */
}DSI_PLLInitTypeDef;
/**
* @brief DSI Video mode configuration
*/
typedef struct
{
uint32_t VirtualChannelID; /*!< Virtual channel ID */
uint32_t ColorCoding; /*!< Color coding for LTDC interface
This parameter can be any value of @ref DSI_Color_Coding */
uint32_t LooselyPacked; /*!< Enable or disable loosely packed stream (needed only when using
18-bit configuration).
This parameter can be any value of @ref DSI_LooselyPacked */
uint32_t Mode; /*!< Video mode type
This parameter can be any value of @ref DSI_Video_Mode_Type */
uint32_t PacketSize; /*!< Video packet size */
uint32_t NumberOfChunks; /*!< Number of chunks */
uint32_t NullPacketSize; /*!< Null packet size */
uint32_t HSPolarity; /*!< HSYNC pin polarity
This parameter can be any value of @ref DSI_HSYNC_Polarity */
uint32_t VSPolarity; /*!< VSYNC pin polarity
This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
uint32_t DEPolarity; /*!< Data Enable pin polarity
This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
uint32_t HorizontalSyncActive; /*!< Horizontal synchronism active duration (in lane byte clock cycles) */
uint32_t HorizontalBackPorch; /*!< Horizontal back-porch duration (in lane byte clock cycles) */
uint32_t HorizontalLine; /*!< Horizontal line duration (in lane byte clock cycles) */
uint32_t VerticalSyncActive; /*!< Vertical synchronism active duration */
uint32_t VerticalBackPorch; /*!< Vertical back-porch duration */
uint32_t VerticalFrontPorch; /*!< Vertical front-porch duration */
uint32_t VerticalActive; /*!< Vertical active duration */
uint32_t LPCommandEnable; /*!< Low-power command enable
This parameter can be any value of @ref DSI_LP_Command */
uint32_t LPLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
can fit in a line during VSA, VBP and VFP regions */
uint32_t LPVACTLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
can fit in a line during VACT region */
uint32_t LPHorizontalFrontPorchEnable; /*!< Low-power horizontal front-porch enable
This parameter can be any value of @ref DSI_LP_HFP */
uint32_t LPHorizontalBackPorchEnable; /*!< Low-power horizontal back-porch enable
This parameter can be any value of @ref DSI_LP_HBP */
uint32_t LPVerticalActiveEnable; /*!< Low-power vertical active enable
This parameter can be any value of @ref DSI_LP_VACT */
uint32_t LPVerticalFrontPorchEnable; /*!< Low-power vertical front-porch enable
This parameter can be any value of @ref DSI_LP_VFP */
uint32_t LPVerticalBackPorchEnable; /*!< Low-power vertical back-porch enable
This parameter can be any value of @ref DSI_LP_VBP */
uint32_t LPVerticalSyncActiveEnable; /*!< Low-power vertical sync active enable
This parameter can be any value of @ref DSI_LP_VSYNC */
uint32_t FrameBTAAcknowledgeEnable; /*!< Frame bus-turn-around acknowledge enable
This parameter can be any value of @ref DSI_FBTA_acknowledge */
}DSI_VidCfgTypeDef;
/**
* @brief DSI Adapted command mode configuration
*/
typedef struct
{
uint32_t VirtualChannelID; /*!< Virtual channel ID */
uint32_t ColorCoding; /*!< Color coding for LTDC interface
This parameter can be any value of @ref DSI_Color_Coding */
uint32_t CommandSize; /*!< Maximum allowed size for an LTDC write memory command, measured in
pixels. This parameter can be any value between 0x00 and 0xFFFFU */
uint32_t TearingEffectSource; /*!< Tearing effect source
This parameter can be any value of @ref DSI_TearingEffectSource */
uint32_t TearingEffectPolarity; /*!< Tearing effect pin polarity
This parameter can be any value of @ref DSI_TearingEffectPolarity */
uint32_t HSPolarity; /*!< HSYNC pin polarity
This parameter can be any value of @ref DSI_HSYNC_Polarity */
uint32_t VSPolarity; /*!< VSYNC pin polarity
This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
uint32_t DEPolarity; /*!< Data Enable pin polarity
This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
uint32_t VSyncPol; /*!< VSync edge on which the LTDC is halted
This parameter can be any value of @ref DSI_Vsync_Polarity */
uint32_t AutomaticRefresh; /*!< Automatic refresh mode
This parameter can be any value of @ref DSI_AutomaticRefresh */
uint32_t TEAcknowledgeRequest; /*!< Tearing Effect Acknowledge Request Enable
This parameter can be any value of @ref DSI_TE_AcknowledgeRequest */
}DSI_CmdCfgTypeDef;
/**
* @brief DSI command transmission mode configuration
*/
typedef struct
{
uint32_t LPGenShortWriteNoP; /*!< Generic Short Write Zero parameters Transmission
This parameter can be any value of @ref DSI_LP_LPGenShortWriteNoP */
uint32_t LPGenShortWriteOneP; /*!< Generic Short Write One parameter Transmission
This parameter can be any value of @ref DSI_LP_LPGenShortWriteOneP */
uint32_t LPGenShortWriteTwoP; /*!< Generic Short Write Two parameters Transmission
This parameter can be any value of @ref DSI_LP_LPGenShortWriteTwoP */
uint32_t LPGenShortReadNoP; /*!< Generic Short Read Zero parameters Transmission
This parameter can be any value of @ref DSI_LP_LPGenShortReadNoP */
uint32_t LPGenShortReadOneP; /*!< Generic Short Read One parameter Transmission
This parameter can be any value of @ref DSI_LP_LPGenShortReadOneP */
uint32_t LPGenShortReadTwoP; /*!< Generic Short Read Two parameters Transmission
This parameter can be any value of @ref DSI_LP_LPGenShortReadTwoP */
uint32_t LPGenLongWrite; /*!< Generic Long Write Transmission
This parameter can be any value of @ref DSI_LP_LPGenLongWrite */
uint32_t LPDcsShortWriteNoP; /*!< DCS Short Write Zero parameters Transmission
This parameter can be any value of @ref DSI_LP_LPDcsShortWriteNoP */
uint32_t LPDcsShortWriteOneP; /*!< DCS Short Write One parameter Transmission
This parameter can be any value of @ref DSI_LP_LPDcsShortWriteOneP */
uint32_t LPDcsShortReadNoP; /*!< DCS Short Read Zero parameters Transmission
This parameter can be any value of @ref DSI_LP_LPDcsShortReadNoP */
uint32_t LPDcsLongWrite; /*!< DCS Long Write Transmission
This parameter can be any value of @ref DSI_LP_LPDcsLongWrite */
uint32_t LPMaxReadPacket; /*!< Maximum Read Packet Size Transmission
This parameter can be any value of @ref DSI_LP_LPMaxReadPacket */
uint32_t AcknowledgeRequest; /*!< Acknowledge Request Enable
This parameter can be any value of @ref DSI_AcknowledgeRequest */
}DSI_LPCmdTypeDef;
/**
* @brief DSI PHY Timings definition
*/
typedef struct
{
uint32_t ClockLaneHS2LPTime; /*!< The maximum time that the D-PHY clock lane takes to go from high-speed
to low-power transmission */
uint32_t ClockLaneLP2HSTime; /*!< The maximum time that the D-PHY clock lane takes to go from low-power
to high-speed transmission */
uint32_t DataLaneHS2LPTime; /*!< The maximum time that the D-PHY data lanes takes to go from high-speed
to low-power transmission */
uint32_t DataLaneLP2HSTime; /*!< The maximum time that the D-PHY data lanes takes to go from low-power
to high-speed transmission */
uint32_t DataLaneMaxReadTime; /*!< The maximum time required to perform a read command */
uint32_t StopWaitTime; /*!< The minimum wait period to request a High-Speed transmission after the
Stop state */
}DSI_PHY_TimerTypeDef;
/**
* @brief DSI HOST Timeouts definition
*/
typedef struct
{
uint32_t TimeoutCkdiv; /*!< Time-out clock division */
uint32_t HighSpeedTransmissionTimeout; /*!< High-speed transmission time-out */
uint32_t LowPowerReceptionTimeout; /*!< Low-power reception time-out */
uint32_t HighSpeedReadTimeout; /*!< High-speed read time-out */
uint32_t LowPowerReadTimeout; /*!< Low-power read time-out */
uint32_t HighSpeedWriteTimeout; /*!< High-speed write time-out */
uint32_t HighSpeedWritePrespMode; /*!< High-speed write presp mode
This parameter can be any value of @ref DSI_HS_PrespMode */
uint32_t LowPowerWriteTimeout; /*!< Low-speed write time-out */
uint32_t BTATimeout; /*!< BTA time-out */
}DSI_HOST_TimeoutTypeDef;
/**
* @brief DSI States Structure definition
*/
typedef enum
{
HAL_DSI_STATE_RESET = 0x00U,