diff --git a/src/finn/custom_op/fpgadataflow/templates.py b/src/finn/custom_op/fpgadataflow/templates.py
index 07a356e5ee7e10a6b51859cb7fb2c4bdb5deeda7..e2f43f4edf206b32974adaf02fd479f0af522702 100644
--- a/src/finn/custom_op/fpgadataflow/templates.py
+++ b/src/finn/custom_op/fpgadataflow/templates.py
@@ -65,6 +65,7 @@ open_solution sol1
 set_part $config_proj_part
 
 config_interface -m_axi_addr64
+config_rtl -auto_prefix
 
 create_clock -period $config_clkperiod -name default
 csynth_design