diff --git a/fetch-repos.sh b/fetch-repos.sh
index 2dd5e519342c01ebe5c3af72784471a537b216b2..9130c183aadc5ce3157fe527bd2f11b935cf3e7e 100755
--- a/fetch-repos.sh
+++ b/fetch-repos.sh
@@ -37,6 +37,7 @@ OMX_COMMIT="d1065a788219ca0eb54d5e57600b1f9d7f67d4cc"
 AVNET_BDF_COMMIT="2d49cfc25766f07792c0b314489f21fe916b639b"
 XIL_BDF_COMMIT="8cf4bb674a919ac34e3d99d8d71a9e60af93d14e"
 EXP_BOARD_FILES_MD5="30eecc497c31050bd46d10ea20eba232"
+# TODO: KV260 ADD commit version 
 
 QONNX_URL="https://github.com/fastmachinelearning/qonnx.git"
 FINN_EXP_URL="https://github.com/Xilinx/finn-experimental.git"
@@ -47,6 +48,8 @@ HLSLIB_URL="https://github.com/Xilinx/finn-hlslib.git"
 OMX_URL="https://github.com/maltanar/oh-my-xilinx.git"
 AVNET_BDF_URL="https://github.com/Avnet/bdf.git"
 XIL_BDF_URL="https://github.com/Xilinx/XilinxBoardStore.git"
+# TODO: KV260 ADD KV260 board downloads
+
 
 QONNX_DIR="qonnx"
 FINN_EXP_DIR="finn-experimental"
diff --git a/src/finn/transformation/fpgadataflow/templates.py b/src/finn/transformation/fpgadataflow/templates.py
index 78bcdea0d701f97e9f80d7c7c489aa01bc93fa52..0554a9cc8ee57d04df39850151992782c41735ba 100644
--- a/src/finn/transformation/fpgadataflow/templates.py
+++ b/src/finn/transformation/fpgadataflow/templates.py
@@ -126,6 +126,9 @@ if {$BOARD == "ZCU104"} {
 } elseif {$BOARD == "Pynq-Z1"} {
     set ZYNQ_TYPE "zynq_7000"
     set_property board_part www.digilentinc.com:pynq-z1:part0:1.0 [current_project]
+} elseif {$BOARD == "kv260_som"} {
+    set ZYNQ_TYPE "zynq_us+"
+    set_property board_part xilinx.com:kv260_som:part0:1.3 [current_project]    
 } else {
     puts "Unrecognized board"
 }
diff --git a/src/finn/util/basic.py b/src/finn/util/basic.py
index 960b7f7c82401b9b61e775118fc4b99c29d40378..3bc5b803db2072f4d0ed3829adab93b4fbd3b98e 100644
--- a/src/finn/util/basic.py
+++ b/src/finn/util/basic.py
@@ -40,7 +40,7 @@ pynq_part_map["ZCU102"] = "xczu9eg-ffvb1156-2-e"
 pynq_part_map["ZCU104"] = "xczu7ev-ffvc1156-2-e"
 pynq_part_map["ZCU111"] = "xczu28dr-ffvg1517-2-e"
 pynq_part_map["RFSoC2x2"] = "xczu28dr-ffvg1517-2-e"
-pynq_part_map["kv260_som"] = "SK-KV260-G"
+pynq_part_map["KV260_SOM"] = "xck26-sfvc784-2LV-c"
 
 
 # native AXI HP port width (in bits) for PYNQ boards
@@ -52,7 +52,7 @@ pynq_native_port_width["ZCU102"] = 128
 pynq_native_port_width["ZCU104"] = 128
 pynq_native_port_width["ZCU111"] = 128
 pynq_native_port_width["RFSoC2x2"] = 128
-pynq_native_port_width["kv260_som"] = 128
+pynq_native_port_width["KV260_SOM"] = 128
 
 # Alveo device and platform mappings
 alveo_part_map = dict()
diff --git a/src/finn/util/platforms.py b/src/finn/util/platforms.py
index 8212cb5712e5b5421e55d8d957905677af555615..ad8604f46e3dc309c9d6b37a2f9347b75aa80871 100644
--- a/src/finn/util/platforms.py
+++ b/src/finn/util/platforms.py
@@ -467,6 +467,7 @@ class Alveo_NxU280_Platform(Platform):
         ]
 
 
+# TODO: ADD KV260 to platform list
 platforms = dict()
 platforms["U50"] = Alveo_NxU50_Platform
 platforms["U200"] = Alveo_NxU200_Platform
@@ -478,3 +479,4 @@ platforms["Ultra96"] = ZU3EG_Platform
 platforms["ZCU104"] = ZU7EV_Platform
 platforms["ZCU102"] = ZU9EG_Platform
 platforms["ZCU111"] = ZU28DR_Platform
+# platforms["kv260_som"] = # TODO kv260 platform... xck26_
\ No newline at end of file