From efeb06e301589297338b5de23f495364f9169c2e Mon Sep 17 00:00:00 2001
From: Yaman Umuroglu <maltanar@gmail.com>
Date: Fri, 12 Jun 2020 22:32:20 +0100
Subject: [PATCH] [Util] introduce out_of_context_synth
---
src/finn/util/vivado.py | 106 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 106 insertions(+)
create mode 100644 src/finn/util/vivado.py
diff --git a/src/finn/util/vivado.py b/src/finn/util/vivado.py
new file mode 100644
index 000000000..561bbc8c5
--- /dev/null
+++ b/src/finn/util/vivado.py
@@ -0,0 +1,106 @@
+# Copyright (c) 2020, Xilinx
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# * Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# * Neither the name of FINN nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+import os
+import subprocess
+
+
+def which(program):
+ "Python equivalent of the shell cmd 'which'."
+
+ # source:
+ # https://stackoverflow.com/questions/377017/test-if-executable-exists-in-python
+ def is_exe(fpath):
+ return os.path.isfile(fpath) and os.access(fpath, os.X_OK)
+
+ fpath, fname = os.path.split(program)
+ if fpath:
+ if is_exe(program):
+ return program
+ else:
+ for path in os.environ["PATH"].split(os.pathsep):
+ exe_file = os.path.join(path, program)
+ if is_exe(exe_file):
+ return exe_file
+
+ return None
+
+
+def out_of_context_synth(
+ verilog_dir,
+ top_name,
+ fpga_part="xczu3eg-sbva484-1-e",
+ clk_name="ap_clk_0",
+ clk_period_ns=5.0,
+):
+ "Run out-of-context Vivado synthesis, return resources and slack."
+
+ # ensure that the OH_MY_XILINX envvar is set
+ if "OHMYXILINX" not in os.environ:
+ raise Exception("The environment variable OHMYXILINX is not defined.")
+ # ensure that vivado is in PATH: source $VIVADO_PATH/settings64.sh
+ if which("vivado") is None:
+ raise Exception("vivado is not in PATH, ensure settings64.sh is sourced.")
+ omx_path = os.environ["OHMYXILINX"]
+ script = "vivadocompile.sh"
+ # vivadocompile.sh <top-level-entity> <clock-name (optional)> <fpga-part (optional)>
+ call_omx = "zsh %s/%s %s %s %s %f" % (
+ omx_path,
+ script,
+ top_name,
+ clk_name,
+ fpga_part,
+ float(clk_period_ns),
+ )
+ call_omx = call_omx.split()
+ proc = subprocess.Popen(
+ call_omx, cwd=verilog_dir, stdout=subprocess.PIPE, env=os.environ
+ )
+ proc.communicate()
+
+ vivado_proj_folder = "%s/results_%s" % (verilog_dir, top_name)
+ res_counts_path = vivado_proj_folder + "/res.txt"
+
+ with open(res_counts_path, "r") as myfile:
+ res_data = myfile.read().split("\n")
+ ret = {}
+ ret["vivado_proj_folder"] = vivado_proj_folder
+ for res_line in res_data:
+ res_fields = res_line.split("=")
+ print(res_fields)
+ try:
+ ret[res_fields[0]] = float(res_fields[1])
+ except ValueError:
+ ret[res_fields[0]] = 0
+ except IndexError:
+ ret[res_fields[0]] = 0
+ if ret["WNS"] == 0:
+ ret["fmax_mhz"] = 0
+ else:
+ ret["fmax_mhz"] = 1000.0 / (clk_period_ns - ret["WNS"])
+ return ret
--
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