diff --git a/src/finn/custom_op/fpgadataflow/hlscustomop.py b/src/finn/custom_op/fpgadataflow/hlscustomop.py
index f73868df4fe0f1657d7701f2e6ef9a3b2d097841..85f5bfd3f119b35123724f00657e2036be9c5715 100644
--- a/src/finn/custom_op/fpgadataflow/hlscustomop.py
+++ b/src/finn/custom_op/fpgadataflow/hlscustomop.py
@@ -113,6 +113,8 @@ class HLSCustomOp(CustomOp):
             "output_hook": ("s", False, ""),
             # characterization of stream input-output behavior per cycle
             "io_characteristic": ("ints", False, []),
+            # the period for which the characterization was run
+            "io_characteristic_period": ("i", False, 0),
         }
 
     def get_verilog_top_module_name(self):