diff --git a/src/finn/builder/build_dataflow_config.py b/src/finn/builder/build_dataflow_config.py
index 6abac895a9ba647d3fd3733fda4b337f3b05dca6..1ef82a4e3fb016bc0f2fb8b2724515722ec971f6 100644
--- a/src/finn/builder/build_dataflow_config.py
+++ b/src/finn/builder/build_dataflow_config.py
@@ -209,6 +209,10 @@ class DataflowBuildConfig:
     #: the full list of layer IP build directories. By default, synthesis will not run.
     stitched_ip_gen_dcp: Optional[bool] = False
 
+    #: (Optional) Insert a signature node to the stitched-IP to read/write information
+    #: to the design: e.g. Customer signature, application signature, version
+    signature: Optional[bool] = False
+
     #: (Optional) Control the maximum width of the per-PE MVAU stream while
     #: exploring the parallelization attributes to reach target_fps
     #: Only relevant if target_fps is specified.
diff --git a/src/finn/builder/build_dataflow_steps.py b/src/finn/builder/build_dataflow_steps.py
index 85f150dcf83972a0d14cef959235965b5cf30fe6..852705c0df71d8be90fe4e73a8818526f84106b0 100644
--- a/src/finn/builder/build_dataflow_steps.py
+++ b/src/finn/builder/build_dataflow_steps.py
@@ -511,6 +511,7 @@ def step_create_stitched_ip(model: ModelWrapper, cfg: DataflowBuildConfig):
                 cfg._resolve_fpga_part(),
                 cfg.synth_clk_period_ns,
                 vitis=cfg.stitched_ip_gen_dcp,
+                signature=cfg.signature,
             )
         )
         # TODO copy all ip sources into output dir? as zip?