diff --git a/src/finn/transformation/fpgadataflow/set_fifo_depths.py b/src/finn/transformation/fpgadataflow/set_fifo_depths.py
index f7d59978d8f8866aefb3028d570bb6b434df33b4..3199d8e7fa7024f2506b4abfa7d6ce0630f508dc 100644
--- a/src/finn/transformation/fpgadataflow/set_fifo_depths.py
+++ b/src/finn/transformation/fpgadataflow/set_fifo_depths.py
@@ -39,8 +39,8 @@ from finn.transformation.fpgadataflow.create_stitched_ip import CreateStitchedIP
 from finn.transformation.fpgadataflow.insert_dwc import InsertDWC
 from finn.transformation.fpgadataflow.insert_fifo import InsertFIFO
 from finn.transformation.general import GiveUniqueNodeNames, GiveReadableTensorNames
-from finn.util.fpgadataflow import pyverilate_stitched_ip, is_fpgadataflow_node
-from finn.util.pyverilator import reset_rtlsim, toggle_clk
+from finn.util.fpgadataflow import is_fpgadataflow_node
+from finn.util.pyverilator import reset_rtlsim, toggle_clk, pyverilate_stitched_ip
 
 
 def reset_implementation(node):
diff --git a/tests/fpgadataflow/test_fpgadataflow_ipstitch.py b/tests/fpgadataflow/test_fpgadataflow_ipstitch.py
index 23d7610dfdf434602f326e1117b072f312962295..4fa780548a544d92e02b28486ae1e325ff1f9a9b 100644
--- a/tests/fpgadataflow/test_fpgadataflow_ipstitch.py
+++ b/tests/fpgadataflow/test_fpgadataflow_ipstitch.py
@@ -52,7 +52,7 @@ from finn.util.basic import (
     alveo_part_map,
     alveo_default_platform,
 )
-from finn.util.fpgadataflow import pyverilate_stitched_ip
+from finn.util.pyverilator import pyverilate_stitched_ip
 from finn.util.test import load_test_checkpoint_or_skip
 from finn.transformation.fpgadataflow.synth_ooc import SynthOutOfContext
 from finn.transformation.infer_data_layouts import InferDataLayouts