From aae59b1e6448c3274c36daa5667f943ee0d56a9a Mon Sep 17 00:00:00 2001
From: Felix Jentzsch <felix.jentzsch@upb.de>
Date: Thu, 1 Jun 2023 11:18:40 +0200
Subject: [PATCH] [Zynq build] update PS IP version
---
src/finn/transformation/fpgadataflow/templates.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/finn/transformation/fpgadataflow/templates.py b/src/finn/transformation/fpgadataflow/templates.py
index f52bad0ff..bc34f61a8 100644
--- a/src/finn/transformation/fpgadataflow/templates.py
+++ b/src/finn/transformation/fpgadataflow/templates.py
@@ -135,7 +135,7 @@ if {$BOARD == "ZCU104"} {
create_bd_design "top"
if {$ZYNQ_TYPE == "zynq_us+"} {
- create_bd_cell -type ip -vlnv xilinx.com:ip:zynq_ultra_ps_e:3.4 zynq_ps
+ create_bd_cell -type ip -vlnv xilinx.com:ip:zynq_ultra_ps_e:3.5 zynq_ps
apply_bd_automation -rule xilinx.com:bd_rule:zynq_ultra_ps_e -config {apply_board_preset "1" } [get_bd_cells zynq_ps]
#activate one slave port, deactivate the second master port
set_property -dict [list CONFIG.PSU__USE__S_AXI_GP2 {1}] [get_bd_cells zynq_ps]
--
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