From 91eaf3b18e1c5db5eac57e05230adc7e92e6c056 Mon Sep 17 00:00:00 2001 From: Yaman Umuroglu <yamanu@xilinx.com> Date: Tue, 30 Nov 2021 18:58:24 +0100 Subject: [PATCH] [Vitis] minor fixes for 2021.1 and Versal Prime parts --- finn-rtllib/memstream/component.xml | 1 + src/finn/custom_op/fpgadataflow/hlscustomop.py | 2 +- src/finn/custom_op/fpgadataflow/templates.py | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/finn-rtllib/memstream/component.xml b/finn-rtllib/memstream/component.xml index 1e5b710dc..63a8540a7 100644 --- a/finn-rtllib/memstream/component.xml +++ b/finn-rtllib/memstream/component.xml @@ -1677,6 +1677,7 @@ <xilinx:family xilinx:lifeCycle="Production">qzynq</xilinx:family> <xilinx:family xilinx:lifeCycle="Production">qzynqplus</xilinx:family> <xilinx:family xilinx:lifeCycle="Production">versal</xilinx:family> + <xilinx:family xilinx:lifeCycle="Production">versalprime</xilinx:family> <xilinx:family xilinx:lifeCycle="Production">virtex7</xilinx:family> <xilinx:family xilinx:lifeCycle="Production">virtexu</xilinx:family> <xilinx:family xilinx:lifeCycle="Production">virtexuplus</xilinx:family> diff --git a/src/finn/custom_op/fpgadataflow/hlscustomop.py b/src/finn/custom_op/fpgadataflow/hlscustomop.py index 7ec049e25..58187bfe4 100644 --- a/src/finn/custom_op/fpgadataflow/hlscustomop.py +++ b/src/finn/custom_op/fpgadataflow/hlscustomop.py @@ -409,7 +409,7 @@ class HLSCustomOp(CustomOp): builder.append_includes("-I/workspace/finn-hlslib") builder.append_includes("-I/workspace/finn/custom_hls") builder.append_includes("-I{}/include".format(os.environ["HLS_PATH"])) - builder.append_includes("--std=c++11") + builder.append_includes("--std=c++14") builder.append_includes("-O3") builder.append_sources(code_gen_dir + "/*.cpp") builder.append_sources("/workspace/cnpy/cnpy.cpp") diff --git a/src/finn/custom_op/fpgadataflow/templates.py b/src/finn/custom_op/fpgadataflow/templates.py index 0c101a3fa..0e4074fea 100644 --- a/src/finn/custom_op/fpgadataflow/templates.py +++ b/src/finn/custom_op/fpgadataflow/templates.py @@ -246,6 +246,8 @@ set_property supported_families { \ kintex7l Production \ kintexu Production \ kintexuplus Production \ + versal Production \ + versalprime Production \ virtex7 Production \ virtexu Production \ virtexuplus Production \ -- GitLab