From 8a2a9b558f8c4a0705c0ce300bf69b605861d7ae Mon Sep 17 00:00:00 2001 From: Felix Jentzsch <felix.jentzsch@upb.de> Date: Fri, 3 Feb 2023 18:44:01 +0100 Subject: [PATCH] Fix top module setting in CreateStitchedIP --- src/finn/transformation/fpgadataflow/create_stitched_ip.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/finn/transformation/fpgadataflow/create_stitched_ip.py b/src/finn/transformation/fpgadataflow/create_stitched_ip.py index 8e2c69bad..d1cb3c4af 100644 --- a/src/finn/transformation/fpgadataflow/create_stitched_ip.py +++ b/src/finn/transformation/fpgadataflow/create_stitched_ip.py @@ -412,7 +412,7 @@ class CreateStitchedIP(Transformation): wrapper_filename = "%s/hdl/%s_wrapper.v" % (bd_base, block_name) tcl.append("add_files -norecurse %s" % wrapper_filename) model.set_metadata_prop("wrapper_filename", wrapper_filename) - tcl.append("set_property top finn_design_wrapper [current_fileset]") + tcl.append("set_property top %s_wrapper [current_fileset]" % block_name) # synthesize to DCP and export stub, DCP and constraints if self.vitis: tcl.append( -- GitLab