diff --git a/finn-rtllib/fmpadding/hdl/axi2we.sv b/finn-rtllib/fmpadding/hdl/axi2we.sv index 0740eac5f8db0e10fad70dacd4d43daf509b6df7..842ba3632c4224d58f87c66e1affc4c028b60ef3 100644 --- a/finn-rtllib/fmpadding/hdl/axi2we.sv +++ b/finn-rtllib/fmpadding/hdl/axi2we.sv @@ -57,7 +57,7 @@ module axi2we #( // Reading tied to all-ones input s_axilite_ARVALID, output s_axilite_ARREADY, - input [3:0] s_axilite_ARADDR, + input [ADDR_BITS-1:0] s_axilite_ARADDR, output s_axilite_RVALID, input s_axilite_RREADY, diff --git a/finn-rtllib/fmpadding/hdl/fmpadding.sv b/finn-rtllib/fmpadding/hdl/fmpadding.sv index 08bcf9043b5eaa3288f482cc6e112eba998d13d5..904c7c381f7b2499fc354ebf798e86edab262866 100644 --- a/finn-rtllib/fmpadding/hdl/fmpadding.sv +++ b/finn-rtllib/fmpadding/hdl/fmpadding.sv @@ -53,7 +53,7 @@ module fmpadding #( // Parameter Configuration ---------- input logic we, - input logic [ 2:0] wa, + input logic [ 4:0] wa, input logic [31:0] wd, //- AXI Stream - Input -------------- @@ -125,13 +125,12 @@ module fmpadding #( always_ff @(posedge clk) begin if(we) begin unique case(wa) - 0: XOn <= wd; - 1: XOff <= wd; - 2: XEnd <= wd; - - 4: YOn <= wd; - 5: YOff <= wd; - 6: YEnd <= wd; + 0*4: XOn <= wd; + 1*4: XOff <= wd; + 2*4: XEnd <= wd; + 3*4: YOn <= wd; + 4*4: YOff <= wd; + 5*4: YEnd <= wd; default: assert(0) else begin $error("Illegal write address."); diff --git a/finn-rtllib/fmpadding/hdl/fmpadding_axi.sv b/finn-rtllib/fmpadding/hdl/fmpadding_axi.sv index c2d4fd2e79d9bdf29d418396650f23daa71f8311..5948341d000a1dd82ff363b36557f897d3a064c7 100644 --- a/finn-rtllib/fmpadding/hdl/fmpadding_axi.sv +++ b/finn-rtllib/fmpadding/hdl/fmpadding_axi.sv @@ -55,7 +55,7 @@ module fmpadding_axi #( // Writing input s_axilite_AWVALID, output s_axilite_AWREADY, - input [2:0] s_axilite_AWADDR, + input [4:0] s_axilite_AWADDR, input s_axilite_WVALID, output s_axilite_WREADY, @@ -69,7 +69,7 @@ module fmpadding_axi #( // Reading input s_axilite_ARVALID, output s_axilite_ARREADY, - input [3:0] s_axilite_ARADDR, + input [4:0] s_axilite_ARADDR, output s_axilite_RVALID, input s_axilite_RREADY, @@ -89,9 +89,9 @@ module fmpadding_axi #( // AXI-Lite Adapter uwire we; - uwire [ 2:0] wa; + uwire [ 4:0] wa; uwire [31:0] wd; - axi2we #(.ADDR_BITS(3)) axilight_adapter ( + axi2we #(.ADDR_BITS(5)) axilight_adapter ( .ap_clk, .ap_rst_n, .s_axilite_AWVALID, .s_axilite_AWREADY, .s_axilite_AWADDR, diff --git a/finn-rtllib/fmpadding/hdl/fmpadding_template.v b/finn-rtllib/fmpadding/hdl/fmpadding_template.v index 25062a81cb937c8380d4f2232cc55bf91ae80f99..0b0f40f86a44ac1d905c89bed5328d6d1ea48876 100644 --- a/finn-rtllib/fmpadding/hdl/fmpadding_template.v +++ b/finn-rtllib/fmpadding/hdl/fmpadding_template.v @@ -40,7 +40,7 @@ input ap_rst_n, // Writing input s_axilite_AWVALID, output s_axilite_AWREADY, -input [2:0] s_axilite_AWADDR, +input [4:0] s_axilite_AWADDR, input s_axilite_WVALID, output s_axilite_WREADY, @@ -54,7 +54,7 @@ output [1:0] s_axilite_BRESP, // Reading input s_axilite_ARVALID, output s_axilite_ARREADY, -input [3:0] s_axilite_ARADDR, +input [4:0] s_axilite_ARADDR, output s_axilite_RVALID, input s_axilite_RREADY, diff --git a/src/finn/custom_op/fpgadataflow/fmpadding_rtl.py b/src/finn/custom_op/fpgadataflow/fmpadding_rtl.py index a85c765a00c6081540d8148715d7ed9e675e36f4..c47f9d52a247cac021346aa91c26ddccd674969a 100644 --- a/src/finn/custom_op/fpgadataflow/fmpadding_rtl.py +++ b/src/finn/custom_op/fpgadataflow/fmpadding_rtl.py @@ -284,12 +284,12 @@ class FMPadding_rtl(HLSCustomOp): idt = self.get_input_datatype() code_gen_dict = self.get_template_values(ifm_dims, pads, chans, simd, idt) config = { - "XON": (0, (code_gen_dict["INIT_XON"])), - "XOFF": (1, (code_gen_dict["INIT_XOFF"])), - "XEND": (2, (code_gen_dict["INIT_XEND"])), - "YON": (4, (code_gen_dict["INIT_YON"])), - "YOFF": (5, (code_gen_dict["INIT_YOFF"])), - "YEND": (6, (code_gen_dict["INIT_YEND"])), + "XON": (0 * 4, (code_gen_dict["INIT_XON"])), + "XOFF": (1 * 4, (code_gen_dict["INIT_XOFF"])), + "XEND": (2 * 4, (code_gen_dict["INIT_XEND"])), + "YON": (3 * 4, (code_gen_dict["INIT_YON"])), + "YOFF": (4 * 4, (code_gen_dict["INIT_YOFF"])), + "YEND": (5 * 4, (code_gen_dict["INIT_YEND"])), } return config