From 7452913f6387d560e213610b60e08c91e3ecc7d2 Mon Sep 17 00:00:00 2001
From: Yaman Umuroglu <maltanar@gmail.com>
Date: Thu, 9 Apr 2020 01:42:11 +0100
Subject: [PATCH] [Analysis] add post_synth_res analysis pass
---
.../analysis/fpgadataflow/post_synth_res.py | 80 +++++++++++++++++++
1 file changed, 80 insertions(+)
create mode 100644 src/finn/analysis/fpgadataflow/post_synth_res.py
diff --git a/src/finn/analysis/fpgadataflow/post_synth_res.py b/src/finn/analysis/fpgadataflow/post_synth_res.py
new file mode 100644
index 000000000..508c34aae
--- /dev/null
+++ b/src/finn/analysis/fpgadataflow/post_synth_res.py
@@ -0,0 +1,80 @@
+# Copyright (c) 2020, Xilinx
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# * Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# * Neither the name of FINN nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+import os
+import xml.etree.ElementTree as ET
+
+from finn.transformation.move_reshape import _is_fpgadataflow_node
+
+
+def post_synth_res(model):
+ """Extracts the FPGA resource results from the Vivado synthesis.
+
+ Returns {node name : resources_dict}."""
+
+ res_dict = {}
+ synth_report_filename = model.get_metadata_prop("vivado_synth_rpt")
+ if os.path.isfile(synth_report_filename):
+ tree = ET.parse(synth_report_filename)
+ root = tree.getroot()
+ all_cells = root.findall(".//tablecell")
+ # strip all whitespace from table cell contents
+ for cell in all_cells:
+ cell.attrib["contents"] = cell.attrib["contents"].strip()
+ else:
+ raise Exception("Please run synthesis first")
+
+ for node in model.graph.node:
+ if _is_fpgadataflow_node(node):
+ row = root.findall(".//*[@contents='%s']/.." % node.name)
+ if row != []:
+ node_dict = {}
+ row = row[0].getchildren()
+ """ Expected XML structure:
+<tablerow class="" suppressoutput="0" wordwrap="0">
+ <tableheader class="" contents="Instance" halign="3" width="-1"/>
+ <tableheader class="" contents="Module" halign="3" width="-1"/>
+ <tableheader class="" contents="Total LUTs" halign="3" width="-1"/>
+ <tableheader class="" contents="Logic LUTs" halign="3" width="-1"/>
+ <tableheader class="" contents="LUTRAMs" halign="3" width="-1"/>
+ <tableheader class="" contents="SRLs" halign="3" width="-1"/>
+ <tableheader class="" contents="FFs" halign="3" width="-1"/>
+ <tableheader class="" contents="RAMB36" halign="3" width="-1"/>
+ <tableheader class="" contents="RAMB18" halign="3" width="-1"/>
+ <tableheader class="" contents="DSP48 Blocks" halign="3" width="-1"/>
+</tablerow>
+ """
+ node_dict["LUT"] = int(row[2].attrib["contents"])
+ node_dict["SRL"] = int(row[5].attrib["contents"])
+ node_dict["FF"] = int(row[6].attrib["contents"])
+ node_dict["BRAM_36K"] = int(row[7].attrib["contents"])
+ node_dict["BRAM_18K"] = int(row[8].attrib["contents"])
+ node_dict["DSP48"] = int(row[9].attrib["contents"])
+ res_dict[node.name] = node_dict
+
+ return res_dict
--
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