From 6957b096c2d325bb7c6df60bbde5c9ffd803674c Mon Sep 17 00:00:00 2001 From: Yaman Umuroglu <maltanar@gmail.com> Date: Thu, 10 Sep 2020 15:20:00 +0200 Subject: [PATCH] [StreamingFC] bring back IPI codegen for mem_mode=const -- ouchie --- src/finn/custom_op/fpgadataflow/streamingfclayer_batch.py | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/finn/custom_op/fpgadataflow/streamingfclayer_batch.py b/src/finn/custom_op/fpgadataflow/streamingfclayer_batch.py index 75be2bec8..37c6ad489 100644 --- a/src/finn/custom_op/fpgadataflow/streamingfclayer_batch.py +++ b/src/finn/custom_op/fpgadataflow/streamingfclayer_batch.py @@ -745,7 +745,7 @@ class StreamingFCLayer_Batch(HLSCustomOp): ) num_w_reps = np.prod(self.get_nodeattr("numInputVectors")) io_dict = { - "inputs": {"in0": inp, "weights": wei*num_w_reps}, + "inputs": {"in0": inp, "weights": wei * num_w_reps}, "outputs": {"out": []}, } self.rtlsim_multi_io(sim, io_dict) @@ -1126,6 +1126,11 @@ class StreamingFCLayer_Batch(HLSCustomOp): % (node_name, dout_name, node_name, node_name, dout_name) ) cmd.append("save_bd_design") + elif mem_mode == "const": + # base class impl sufficient for const mode + return super().code_generation_ipi() + else: + raise Exception("Unrecognized mem_mode for StreamingFCLayer") return cmd def get_verilog_top_module_intf_names(self): -- GitLab