diff --git a/src/finn/custom_op/fpgadataflow/fmpadding.py b/src/finn/custom_op/fpgadataflow/fmpadding_batch.py
similarity index 88%
rename from src/finn/custom_op/fpgadataflow/fmpadding.py
rename to src/finn/custom_op/fpgadataflow/fmpadding_batch.py
index fa321dfa65d14b67fa218fb6a49f602ddab8d57e..d326ae7dfc7830a0081c3b13233d67ef08b12eff 100644
--- a/src/finn/custom_op/fpgadataflow/fmpadding.py
+++ b/src/finn/custom_op/fpgadataflow/fmpadding_batch.py
@@ -21,6 +21,8 @@ class FMPadding_Batch(HLSCustomOp):
"Padding": ("i", True, 2),
# number of channels in input image
"NumChannels": ("i", True, 0),
+ # SIMD Input parallelism
+ "SIMD": ("i", False, 1),
# FINN input datatype
"inputDataType": ("s", True, ""),
# controls distribution of padded pixels
@@ -55,20 +57,22 @@ class FMPadding_Batch(HLSCustomOp):
return oshape
def get_folded_input_shape(self):
- # even though there is no folding in the current hlslib op,
- # insert a time multiplexing axis to remain compatible with the
- # shapes produced by the rest of the dataflow pipeline
- ret = list(self.get_normal_input_shape())
- ret.insert(-1, 1)
- return tuple(ret)
+ normal_ishape = list(self.get_normal_input_shape())
+ ifm_ch = self.get_nodeattr("NumChannels")
+ simd = self.get_nodeattr("SIMD")
+ assert ifm_ch % simd == 0, "SIMD must divide input channels"
+ fold = int(normal_ishape[-1] / simd)
+ folded_ishape = normal_ishape[:-1] + [fold, simd]
+ return tuple(folded_ishape)
def get_folded_output_shape(self):
- # even though there is no folding in the current hlslib op,
- # insert a time multiplexing axis to remain compatible with the
- # shapes produced by the rest of the dataflow pipeline
- ret = list(self.get_normal_output_shape())
- ret.insert(-1, 1)
- return tuple(ret)
+ normal_oshape = list(self.get_normal_output_shape())
+ ifm_ch = self.get_nodeattr("NumChannels")
+ simd = self.get_nodeattr("SIMD")
+ assert ifm_ch % simd == 0, "SIMD must divide input channels"
+ fold = int(normal_oshape[-1] / simd)
+ folded_oshape = normal_oshape[:-1] + [fold, simd]
+ return tuple(folded_oshape)
def make_shape_compatible_op(self, model):
exp_ishape = self.get_normal_input_shape()
@@ -114,15 +118,13 @@ class FMPadding_Batch(HLSCustomOp):
def get_instream_width(self):
ibits = self.get_input_datatype().bitwidth()
- num_ch = self.get_nodeattr("NumChannels")
-
- return ibits * num_ch
+ simd = self.get_nodeattr("SIMD")
+ return ibits * simd
def get_outstream_width(self):
obits = self.get_output_datatype().bitwidth()
- num_ch = self.get_nodeattr("NumChannels")
-
- return obits * num_ch
+ simd = self.get_nodeattr("SIMD")
+ return obits * simd
def get_number_output_values(self):
folded_oshape = self.get_folded_output_shape()
@@ -135,13 +137,15 @@ class FMPadding_Batch(HLSCustomOp):
self.code_gen_dict["$DEFINES$"] = [
"""#define ImgDim1 {}\n#define OutputDim1 {}\n
#define Padding1 {}\n#define NumChannels1 {}\n
- #define PaddingStyle1 {}\n#define numReps {}\n""".format(
+ #define PaddingStyle1 {}\n#define numReps {}
+ #define SIMD1 {}\n""".format(
self.get_nodeattr("ImgDim"),
self.get_padded_odim(),
self.get_nodeattr("Padding"),
self.get_nodeattr("NumChannels"),
self.get_nodeattr("PaddingStyle"),
self.get_nodeattr("numInputVectors"),
+ self.get_nodeattr("SIMD"),
)
]
@@ -176,7 +180,7 @@ class FMPadding_Batch(HLSCustomOp):
in_t = self.get_input_datatype().get_hls_datatype_str()
node = self.onnx_node
self.code_gen_dict["$DOCOMPUTE$"] = [
- """{}<ImgDim1, OutputDim1, Padding1, NumChannels1,
+ """{}<ImgDim1, OutputDim1, Padding1, NumChannels1,SIMD1,
{}, PaddingStyle1> (in0, out, numReps);""".format(
node.op_type, in_t
)
@@ -232,6 +236,7 @@ class FMPadding_Batch(HLSCustomOp):
node = self.onnx_node
exp_ishape = self.get_normal_input_shape()
exp_oshape = self.get_normal_output_shape()
+ folded_ishape = self.get_folded_input_shape()
folded_oshape = self.get_folded_output_shape()
if mode == "cppsim":
@@ -254,10 +259,8 @@ class FMPadding_Batch(HLSCustomOp):
match expected shape (1, ImgDim, ImgDim, NumChannels)."""
export_idt = self.get_input_datatype()
- # no reshaping for input since assuming no folding on input
- # make copy before saving array
- inp = inp.copy()
- np.save(os.path.join(code_gen_dir, "input_0.npy"), inp)
+ reshaped_input = inp.reshape(folded_ishape)
+ np.save(os.path.join(code_gen_dir, "input_0.npy"), reshaped_input)
if mode == "cppsim":
# execute the precompiled model
diff --git a/src/finn/custom_op/registry.py b/src/finn/custom_op/registry.py
index 614a3d7ffd70d0b102bad2b76177a2d3b32765c7..0109aa1c5410b73814c04ccd2afee6432997d2f2 100644
--- a/src/finn/custom_op/registry.py
+++ b/src/finn/custom_op/registry.py
@@ -44,7 +44,7 @@ from finn.custom_op.fpgadataflow.streamingdatawidthconverter_batch import (
StreamingDataWidthConverter_Batch,
)
from finn.custom_op.fpgadataflow.globalaccpool_batch import GlobalAccPool_Batch
-from finn.custom_op.fpgadataflow.fmpadding import FMPadding_Batch
+from finn.custom_op.fpgadataflow.fmpadding_batch import FMPadding_Batch
from finn.custom_op.fpgadataflow.thresholding_batch import Thresholding_Batch
from finn.custom_op.fpgadataflow.addstreams_batch import AddStreams_Batch
from finn.custom_op.fpgadataflow.labelselect_batch import LabelSelect_Batch
diff --git a/tests/fpgadataflow/test_fpgadataflow_fmpadding.py b/tests/fpgadataflow/test_fpgadataflow_fmpadding.py
index 9d6390b2673e5d2c0e72748183ac04ed222d078e..5ff3da87228a2a32a41226bb46e0b16b1a44df50 100644
--- a/tests/fpgadataflow/test_fpgadataflow_fmpadding.py
+++ b/tests/fpgadataflow/test_fpgadataflow_fmpadding.py
@@ -23,7 +23,7 @@ test_fpga_part = pynq_part_map[test_pynq_board]
target_clk_ns = 10
-def make_single_fmpadding_modelwrapper(idim, padding, num_ch, idt, pad_style):
+def make_single_fmpadding_modelwrapper(idim, padding, num_ch, simd, idt, pad_style):
assert pad_style == 2, "only pad_style == 2 supported in hlslib"
assert padding > 0, "Output dim should be greater than input dim"
odim = idim + padding
@@ -47,6 +47,7 @@ def make_single_fmpadding_modelwrapper(idim, padding, num_ch, idt, pad_style):
inputDataType=str(idt.name),
PaddingStyle=pad_style,
numInputVectors=1,
+ SIMD=simd,
)
graph = helper.make_graph(
@@ -63,11 +64,13 @@ def make_single_fmpadding_modelwrapper(idim, padding, num_ch, idt, pad_style):
# input image dimension
-@pytest.mark.parametrize("idim", [8, 16])
+@pytest.mark.parametrize("idim", [8])
# number of rows and number of cols to add
@pytest.mark.parametrize("pad", [2, 3])
# number of channels
-@pytest.mark.parametrize("num_ch", [1, 2])
+@pytest.mark.parametrize("num_ch", [2, 4])
+# Input parallelism
+@pytest.mark.parametrize("simd", [1, 2])
# PaddingStyle: selects behavior when (odim-idim)%2 != 0
@pytest.mark.parametrize("pad_style", [2])
# FINN input datatype
@@ -76,14 +79,15 @@ def make_single_fmpadding_modelwrapper(idim, padding, num_ch, idt, pad_style):
@pytest.mark.parametrize("mode", ["cppsim", "rtlsim"])
@pytest.mark.slow
@pytest.mark.vivado
-def test_fpgadataflow_fmpadding(idim, pad, num_ch, pad_style, idt, mode):
-
+def test_fpgadataflow_fmpadding(idim, pad, num_ch, simd, pad_style, idt, mode):
+ if num_ch % simd != 0:
+ pytest.skip(" num_ch % simd != 0, skipping")
# generate input data
x = gen_finn_dt_tensor(idt, [1, idim, idim, num_ch])
input_dict = {"inp": x}
odim = idim + pad
- model = make_single_fmpadding_modelwrapper(idim, pad, num_ch, idt, pad_style)
+ model = make_single_fmpadding_modelwrapper(idim, pad, num_ch, simd, idt, pad_style)
model = model.transform(InferShapes())
model = model.transform(SetExecMode(mode))
model = model.transform(GiveUniqueNodeNames())