From 57a67250a245b1f9671e89acac0e6a4fb3258a46 Mon Sep 17 00:00:00 2001
From: Yaman Umuroglu <maltanar@gmail.com>
Date: Thu, 13 Feb 2020 01:45:28 +0100
Subject: [PATCH] [Test] specify target PYNQ board from env.var, add part
mapping
---
Dockerfile | 1 +
src/finn/util/basic.py | 5 +++++
tests/fpgadataflow/test_fpgadataflow_ip_stitch.py | 11 +++--------
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/Dockerfile b/Dockerfile
index 734a8fd3f..7780d3fd4 100644
--- a/Dockerfile
+++ b/Dockerfile
@@ -25,6 +25,7 @@ ENV PYTHONPATH "${PYTHONPATH}:/workspace/brevitas_cnv_lfc/training_scripts"
ENV PYTHONPATH "${PYTHONPATH}:/workspace/brevitas"
ENV PYTHONPATH "${PYTHONPATH}:/workspace/pyverilator"
ENV PYNQSHELL_PATH "/workspace/PYNQ-HelloWorld/boards"
+ENV PYNQ_BOARD "Pynq-Z1"
ARG GID
ARG GNAME
diff --git a/src/finn/util/basic.py b/src/finn/util/basic.py
index 6fc357dcc..63dc9227c 100644
--- a/src/finn/util/basic.py
+++ b/src/finn/util/basic.py
@@ -8,6 +8,11 @@ import numpy as np
from finn.core.datatype import DataType
+# mapping from PYNQ board names to FPGA part names
+pynq_part_map = dict()
+pynq_part_map["Ultra96"] = "xczu3eg-sbva484-1-e"
+pynq_part_map["Pynq-Z1"] = "xc7z020clg400-1"
+
def get_finn_root():
"Return the root directory that FINN is cloned into."
diff --git a/tests/fpgadataflow/test_fpgadataflow_ip_stitch.py b/tests/fpgadataflow/test_fpgadataflow_ip_stitch.py
index f6488ec79..e1f7c876e 100644
--- a/tests/fpgadataflow/test_fpgadataflow_ip_stitch.py
+++ b/tests/fpgadataflow/test_fpgadataflow_ip_stitch.py
@@ -20,16 +20,11 @@ from finn.util.basic import (
calculate_signed_dot_prod_range,
gen_finn_dt_tensor,
make_build_dir,
+ pynq_part_map,
)
-# TODO control board/part for tests from a global place
-# settings for Ultra96
-# test_fpga_part = "xczu3eg-sbva484-1-e"
-# test_pynq_board = "Ultra96"
-
-# settings for PYNQ-Z1
-test_fpga_part = "xc7z020clg400-1"
-test_pynq_board = "Pynq-Z1"
+test_pynq_board = os.getenv("PYNQ_BOARD", default="Pynq-Z1")
+test_fpga_part = pynq_part_map[test_pynq_board]
ip_stitch_model_dir = make_build_dir("test_fpgadataflow_ipstitch")
--
GitLab