From 47aeb173d73a904c1b3deb27d7fed4538f36e9a2 Mon Sep 17 00:00:00 2001
From: auphelia <jakobapk@web.de>
Date: Tue, 31 Jan 2023 08:41:54 +0000
Subject: [PATCH] [Tests] Modify copyright header and delete print statements
---
.../test_fpgadataflow_convinputgenerator_rtl_dynamic.py | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/tests/fpgadataflow/test_fpgadataflow_convinputgenerator_rtl_dynamic.py b/tests/fpgadataflow/test_fpgadataflow_convinputgenerator_rtl_dynamic.py
index 979dcbfab..1e64880ea 100644
--- a/tests/fpgadataflow/test_fpgadataflow_convinputgenerator_rtl_dynamic.py
+++ b/tests/fpgadataflow/test_fpgadataflow_convinputgenerator_rtl_dynamic.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2022, Xilinx
+# Copyright (c) 2022, Advanced Micro Devices, Inc.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -197,9 +197,6 @@ def test_fpgadataflow_conv_dynamic():
getCustomOp(swg_node).set_nodeattr("dynamic_mode", 1)
getCustomOp(swg_node).set_nodeattr("inFIFODepths", [16])
getCustomOp(swg_node).set_nodeattr("outFIFODepths", [16])
- print("SWG initial config:")
- idim = getCustomOp(swg_node).get_nodeattr("IFMDim")
- print(getCustomOp(swg_node).get_dynamic_config(idim))
model = model.transform(InsertFIFO())
model = model.transform(GiveUniqueNodeNames())
model = model.transform(GiveReadableTensorNames())
--
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