diff --git a/src/finn/transformation/fpgadataflow/vitis_build.py b/src/finn/transformation/fpgadataflow/vitis_build.py index 2e1f3fee2a3ba06f1feb192b9c21e6a5671ad48b..b6fc62f57f539d69c2d2a0cfa26fb4574f1d7747 100644 --- a/src/finn/transformation/fpgadataflow/vitis_build.py +++ b/src/finn/transformation/fpgadataflow/vitis_build.py @@ -174,11 +174,15 @@ class VitisLink(Transformation): ModelProto's metadata_props field with the XCLBIN full path as value. """ - def __init__(self, platform, f_mhz=200, strategy=VitisOptStrategy.PERFORMANCE): + def __init__( + self, platform, f_mhz=200, strategy=VitisOptStrategy.PERFORMANCE, + enable_debug=False + ): super().__init__() self.platform = platform self.f_mhz = f_mhz self.strategy = strategy + self.enable_debug = enable_debug def apply(self, model): _check_vitis_envvars() @@ -255,6 +259,11 @@ class VitisLink(Transformation): with open(link_dir + "/gen_report_xml.tcl", "w") as f: f.write(gen_rep_xml) + debug_commands = [] + if self.enable_debug: + for inst in list(instance_names.values()): + debug_commands.append("--dk chipscope:%s" % inst) + # create a shell script and call Vitis script = link_dir + "/run_vitis_link.sh" working_dir = os.environ["PWD"] @@ -264,12 +273,13 @@ class VitisLink(Transformation): f.write( "v++ -t hw --platform %s --link %s" " --kernel_frequency %d --config config.txt --optimize %s" - " --save-temps -R2\n" + " --save-temps -R2 %s\n" % ( self.platform, " ".join(object_files), self.f_mhz, self.strategy.value, + " ".join(debug_commands), ) ) f.write("cd {}\n".format(working_dir)) @@ -306,13 +316,16 @@ class VitisBuild(Transformation): """Best-effort attempt at building the accelerator with Vitis.""" def __init__( - self, fpga_part, period_ns, platform, strategy=VitisOptStrategy.PERFORMANCE + self, fpga_part, period_ns, platform, + strategy=VitisOptStrategy.PERFORMANCE, + enable_debug=False ): super().__init__() self.fpga_part = fpga_part self.period_ns = period_ns self.platform = platform self.strategy = strategy + self.enable_debug = enable_debug def apply(self, model): _check_vitis_envvars() @@ -359,7 +372,8 @@ class VitisBuild(Transformation): # Assemble design from kernels model = model.transform( VitisLink( - self.platform, round(1000 / self.period_ns), strategy=self.strategy + self.platform, round(1000 / self.period_ns), strategy=self.strategy, + enable_debug=self.enable_debug ) ) # set platform attribute for correct remote execution