From 32d532b7fc42f47658db1a0dab7d247cb08a4402 Mon Sep 17 00:00:00 2001
From: Yaman Umuroglu <maltanar@gmail.com>
Date: Wed, 12 Aug 2020 23:28:28 +0200
Subject: [PATCH] [Test] sim_cycles -> cycles_rtlsim
---
tests/fpgadataflow/test_convert_to_hls_conv_layer.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/fpgadataflow/test_convert_to_hls_conv_layer.py b/tests/fpgadataflow/test_convert_to_hls_conv_layer.py
index 20333bda5..c112129fe 100644
--- a/tests/fpgadataflow/test_convert_to_hls_conv_layer.py
+++ b/tests/fpgadataflow/test_convert_to_hls_conv_layer.py
@@ -140,8 +140,8 @@ def test_convert_to_hls_conv_layer(conv_config, depthwise, exec_mode):
if depthwise is True and exec_mode == "rtlsim":
node = new_model.get_nodes_by_op_type("Vector_Vector_Activate_Batch")[0]
inst = getCustomOp(node)
- sim_cycles = inst.get_nodeattr("sim_cycles")
+ cycles_rtlsim = inst.get_nodeattr("cycles_rtlsim")
exp_cycles_dict = new_model.analysis(exp_cycles_per_layer)
exp_cycles = exp_cycles_dict[str(node)]
- assert np.isclose(exp_cycles, sim_cycles, atol=11)
+ assert np.isclose(exp_cycles, cycles_rtlsim, atol=11)
assert exp_cycles != 0
--
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