diff --git a/tests/fpgadataflow/test_fpgadataflow_sameresize.py b/tests/fpgadataflow/test_fpgadataflow_sameresize.py index 8013e18c5e5c3e8cab0c7c596242e2007fb960db..ec776caca59989295870e88a5d6c151f54973c42 100644 --- a/tests/fpgadataflow/test_fpgadataflow_sameresize.py +++ b/tests/fpgadataflow/test_fpgadataflow_sameresize.py @@ -1,4 +1,5 @@ import pytest +import os from onnx import TensorProto, helper from finn.core.datatype import DataType @@ -10,6 +11,15 @@ from finn.transformation.fpgadataflow.set_exec_mode import SetExecMode from finn.transformation.general import GiveUniqueNodeNames from finn.transformation.fpgadataflow.prepare_cppsim import PrepareCppSim from finn.transformation.fpgadataflow.compile_cppsim import CompileCppSim +from finn.transformation.fpgadataflow.prepare_ip import PrepareIP +from finn.transformation.fpgadataflow.hlssynth_ip import HLSSynthIP +from finn.transformation.fpgadataflow.prepare_rtlsim import PrepareRTLSim + +from finn.util.basic import pynq_part_map + +test_pynq_board = os.getenv("PYNQ_BOARD", default="Pynq-Z1") +test_fpga_part = pynq_part_map[test_pynq_board] +target_clk_ns = 10 def make_single_sameresize_modelwrapper( @@ -61,7 +71,7 @@ def make_single_sameresize_modelwrapper( @pytest.mark.parametrize("idt", [DataType.INT2]) # PaddingStyle: distribution of added values to achieve "same" padding @pytest.mark.parametrize("pad_style", [2]) -def test_fpgadataflow_sameresize(idim, kdim, stride, num_ch, idt, pad_style): +def test_fpgadataflow_sameresize_cppsim(idim, kdim, stride, num_ch, idt, pad_style): assert idim % stride == 0, "Stride must divide input dimension." # number of "same" windows over the input data same_windows = idim // stride @@ -83,3 +93,41 @@ def test_fpgadataflow_sameresize(idim, kdim, stride, num_ch, idt, pad_style): expected_oshape = (1, odim, odim, num_ch) assert y.shape == expected_oshape + + +# image dimension +@pytest.mark.parametrize("idim", [4]) +# kernel dimension +@pytest.mark.parametrize("kdim", [2]) +# stride +@pytest.mark.parametrize("stride", [1]) +# number of channels +@pytest.mark.parametrize("num_ch", [2]) +# FINN input datatype +@pytest.mark.parametrize("idt", [DataType.INT2]) +# PaddingStyle: distribution of added values to achieve "same" padding +@pytest.mark.parametrize("pad_style", [2]) +@pytest.mark.slow +@pytest.mark.vivado +def test_fpgadataflow_sameresize_rtlsim(idim, kdim, stride, num_ch, idt, pad_style): + assert idim % stride == 0, "Stride must divide input dimension." + # number of "same" windows over the input data + same_windows = idim // stride + odim = kdim + stride * (same_windows - 1) + + # generate input data + x = gen_finn_dt_tensor(idt, [1, idim, idim, num_ch]) + input_dict = {"inp": x} + + model = make_single_sameresize_modelwrapper( + idim, odim, kdim, stride, num_ch, idt, pad_style + ) + model = model.transform(SetExecMode("rtlsim")) + model = model.transform(GiveUniqueNodeNames()) + model = model.transform(PrepareIP(test_fpga_part, target_clk_ns)) + model = model.transform(HLSSynthIP()) + model = model.transform(PrepareRTLSim()) + y = oxe.execute_onnx(model, input_dict)["outp"] + + expected_oshape = (1, odim, odim, num_ch) + assert y.shape == expected_oshape